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AD9516-2/PCBZ Fiches technique(PDF) 60 Page - Analog Devices

No de pièce AD9516-2/PCBZ
Description  14-Output Clock Generator with Integrated 2.2 GHz VCO
PDF  84 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD9516-2/PCBZ Fiches technique(HTML) 60 Page - Analog Devices

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AD9516-2
Rev. 0 | Page 60 of 84
REGISTER MAP DESCRIPTIONS
Table 52 through Table 61 provide a detailed description of each of the control register functions. The registers are listed by hexadecimal
address. Reference to a specific bit or range of bits within a register is indicated by angle brackets. For example, <3> refers to Bit 3, and
<5:2> refers to the range of bits from Bit 5 through Bit 2.
Table 52. Serial Port Configuration
Reg. Addr (Hex)
Bit(s)
Name
Description
00
<7>
SDO Active
Selects unidirectional or bidirectional data transfer mode.
<7> = 0; SDIO pin used for write and read; SDO set high impedance; bidirectional mode.
<7> = 1; SDO used for read; SDIO used for write; unidirectional mode.
00
<6>
LSB First
MSB or LSB data orientation.
<6> = 0; data-oriented MSB first; addressing decrements.
<6> = 1; data-oriented LSB first; addressing increments.
00
<5>
Soft Reset
Soft Reset
<5> = 1 (not self-clearing). Soft reset; restores default values to internal registers.
Not self-clearing. Must be cleared to 0b to complete reset operation.
00
<4>
Long Instruction
Short/long instruction mode (this part uses long instruction mode only, so this bit
should always be =1).
<4> = 0; 8-bit instruction (short).
<4> = 1; 16-bit instruction (long).
00
<3:0>
Mirror <7:4>
Bits<3:0> should always mirror <7:4> so that it does not matter whether the part
is in MSB or LSB first mode (see Register 0x00 <6>). User should set bits as follows:
<0> = <7>.
<1> = <6>.
<2> = <5>.
<3> = <4>.
04
<0>
Read Back Active Registers
Select register bank used for a readback.
<0> = 0; read back buffer registers.
<0> = 1; read back active registers.



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