AS39513 datasheet(97/108 Pages) AMSCO

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[v1-10] 2018-Apr-25

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AS39513 − Detailed Description

Where the timing parameters are as follows:

Figure 56:

Timing Parameters, VBAT = 3V or 1.5V (unless otherwise noted)

Note(s):

1. When the digital interface was not already in SPI mode.

2. When the digital interface has been locked into SPI mode.

3. tSC reduces to 0.4μs @ VBAT=3V

The write command initiates a write with the falling edge of CE.

If the interface is locked in SPI mode, the write processing status

is indicated by a pulse on DOUT. This timing detail is shown

below.

Figure 57:

Write Command Timing Detail

Symbol

Description

Min

Max

Unit

tSC

CE to first SCLK rising edge setup time (1)

150

μs

tSC

CE to first SCLK rising edge setup time, VBAT = 1.5V(2)

2.0(3)

μs

tOG

DOUT valid time

tCH

SCLK high period

tCL

SCLK low period

tDS

DIN data setup time

tDH

DIN data hold time

SCLK

DIN

DOUT

tWE

tWS

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