ADE9000ACPZ datasheet(52/73 Pages) AD

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Data Sheet

ADE9000

Rev. A | Page 51 of 72

Table 7 details the registers of the ADE9000 that have bit fields. Additional registers listed in Table 6 do not have bit fields.

Table 7. Register Details

Addr. Name

Bits

Bit Name

Settings Description

Reset

Access

0x060 CONFIG0

[31:14] RESERVED

Reserved.

0x0

DISRPLPF

Set this bit to disable the low-pass filter in the

total reactive power datapath.

0x0

R/W

DISAPLPF

Set this bit to disable the low-pass filter in the

total active power datapath.

0x0

R/W

ININTEN

Set this bit to enable the digital integrator in the

neutral current channel.

0x0

R/W

VNOMC_EN

Set this bit to use the nominal phase voltage

rms, VNOM, in the computation of Phase C total

apparent power, CVA.

0x0

R/W

VNOMB_EN

Set this bit to use the nominal phase voltage

rms, VNOM, in the computation of Phase B total

apparent power, BVA.

0x0

R/W

VNOMA_EN

Set this bit to use the nominal phase voltage

rms, VNOM, in the computation of Phase A total

apparent power, AVA.

0x0

R/W

RMS_SRC_SEL

This bit selects which samples are used for the

rms½ and 10 cycle rms/12 cycle rms calculation.

0x0

R/W

0 xI_PCF waveforms, after the high-pass filter and

integrator.

1 ADC samples, before the high-pass filter and

integrator.

ZX_SRC_SEL

This bit selects whether data going into the zero-

crossing detection circuit comes before the

high-pass filter, integrator, and phase

compensation or afterwards.

0x0

R/W

0 After the high-pass filter, integrator, and phase

compensation.

1 Before the high-pass filter, integrator, and phase

compensation.

INTEN

Set this bit to enable the integrators in the phase

current channels. The neutral current channel

integrator is managed by the ININTEN bit in the

CONFIG0 register.

0x0

R/W

MTEN

Set this bit to enable multipoint phase and gain

compensation. If enabled, an additional gain

factor, xIGAIN0 through xIGAIN5, is applied to

the current channel based on the xIRMS current

rms amplitude and the MTTHR_Lx and

MTTHR_Hx register values.

0x0

R/W

HPFDIS

Set this bit to disable high-pass filters in all the

voltage and current channels.

0x0

R/W

RESERVED

Reserved.

0x0

[1:0]

ISUM_CFG

ISUM calculation configuration.

0x0

R/W

00 ISUM = AI_PCF + BI_PCF + CI_PCF (for

approximated neutral current rms calculation).

01 ISUM = AI_PCF + BI_PCF + CI_PCF + NI_PCF (to

determine mismatch between neutral and

phase currents).

10 ISUM = AI_PCF + BI_PCF + CI_PCF − NI_PCF (to

determine mismatch between neutral and

phase currents).

11 ISUM = AI_PCF + BI_PCF + CI_PCF (for

approximated neutral current rms calculation).

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