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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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ADE9000ACPZ Fiches technique(PDF) 37 Page - Analog Devices |
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ADE9000ACPZ Fiches technique(HTML) 37 Page - Analog Devices |
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37 / 73 page  ADE9000 Data Sheet Rev. A | Page 36 of 72 INTERRUPTS/EVENTS The ADE9000 has three pins (IRQ0, IRQ1, and CF4/EVENT/ DREADY) that can be used as interrupts to the host processor. The IRQ0 and IRQ1 pins go low when an enabled interrupt occurs and stay low until the event is acknowledged by setting the corresponding status bit in the STATUS0 and STATUS1 registers, respectively. The bits in MASK0 and MASK1 configure respective interrupts. The EVENT function, which can multiplex with the CF4 and DREADY options, tracks the state of the enabled signals and goes low and high with these internal signals. The CF4_CFG bits in CONFIG1 register set the CF4/EVENT/DREADY pin functionality. The CF4/EVENT/ DREADY pin is useful for measuring the duration of events, such as dips or swells, externally. |
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