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L99MM70XP Fiches technique(PDF) 22 Page - STMicroelectronics |
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L99MM70XP Fiches technique(HTML) 22 Page - STMicroelectronics |
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22 / 68 page ![]() Description L99MM70XP 22/68 Doc ID 022637 Rev 2 3.12 LIN bus interface 3.12.1 General features ● Speed communication up to 20 kbit/s ● High speed Flash mode 100 kbit/s ● LIN 2.1 compliant (SAEJ2602 compatible) transceiver ● Function range from +40 V to -18 V DC at LIN pin ● GND disconnection fail safe at module level ● Off mode: does not disturb network ● GND shift operation at system level ● Microcontroller Interface with CMOS compatible I/O pins ● Pull up internal resistor ● ESD: immunity against automotive transients per ISO7637 specification ● Matched output slopes and propagation delay In order to further reduce the current consumption in standby mode, the integrated LIN bus interface offers an ultra low current consumption. 3.12.2 LIN error handling The L99MM70XP provides the following 3 error handling features which are not described in the LIN Specifications V2.1, but are realized in different stand alone LIN transceivers/microcontrollers to switch the application back to normal operation mode. Dominant TXD time out A permanent low-level on pin TXD would force the bus into a permanent dominant state, blocking all network communication. If pin TXD remains at low-level for longer than the TXD dominant timeout tdom(TXD), the transmitter is disabled. The status bit is latched and can be read and optionally cleared by SPI. The transmitter remains disabled until the status register is cleared. This feature can be disabled via SPI. LIN BUS permanent recessive If TXD changes to low-level but the bus does not follow within trec(LIN), the transmitter is disabled. The status bit is latched and can be read and optionally cleared by SPI. The transmitter remains disabled until the status register is cleared. LIN BUS permanent dominant If a dominant state on the bus persists for longer than tdom(LIN) a permanent dominant status is detected. The status bit is latched and can be read and optionally cleared by SPI. The transmitter of the transceiver is not disabled. Note: A wake-up caused by a message on the bus starts the voltage regulator and the microcontroller to switch the application back to normal operation mode. 3.12.3 Wake-up (from LIN bus) In standby mode the L99MM70XP can receive a wake-up from LIN bus. For the wake-up feature the L99MM70XP logic differentiates two different conditions. |
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