L99MM70XP datasheet(61/68 Pages) STMICROELECTRONICS

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L99MM70XP

SPI control and status registers

Doc ID 022637 Rev 2

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Table 44.

Status register 2

Status register 2 (12h)

Bit

13121110

Reset state

000000

Name

ECFD

ECV

OUT9

OUT8

OUT7

OUT6

OUT5

OUT4

OUT3

OUT2

OUT1

Table 45.

Status register 2, bits

Bit name

Comment

ECFDLSOL

The open-load detection monitors the load current in each activated output stage. If the load current

is below the under current detection threshold for at least tdOL = 2ms, the corresponding open-load

bit is set. Due to the mechanical / electrical inertia of typical loads a short activation of the outputs

(e.g. 3 ms) can be used to test the open-load status without changing the mechanical / electrical

state of the loads.

The open-load detection of OUT1 HS and OUT1 LS can be masked by the configuration register

(Bit 4/5).

The open-load detection of ECFDLS, ECVLS and OUT7 can be masked by the configuration

ECVLSOL

OUT9OL

OUT8OL

OUT7OL

OUT6OL

OUT5HSOL

OUT5LSOL

OUT4HSOL

OUT4LSOL

OUT3HSOL

OUT3LSOL

OUT2HSOL

OUT2LSOL

OUT1HSOL

Maskable by the configuration register:

an open-load event is not considered in open-load bit (TW_OL) of global status register.

OUT1LSOL

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