L99MM70XP datasheet(62/68 Pages) STMICROELECTRONICS

62 / 68 page

SPI control and status registers

L99MM70XP

62/68

Doc ID 022637 Rev 2

Table 46.

Status register 3

Status register 3 (13h)

Bit

Reset

state

Name

LIN

perm

dom

LIN

TXD

dom

LIN

prem

rec

VCC

fail

timer

state

timer

state

ECFD

HSOC

ECFD

HSOL

ECV

ECVO

TSD2

TSD1

Table 47.

Status register 3, bits

Bit name

Comment

LIN perm dom

If the bus state is dominant (low) for more than 12 ms a permanent dominant status is detected.

The status bit is set.

LIN TXD dom

If TXD is in dominant state (low) for more than 12 ms, the transmitter is disabled and this bit is set.

LIN perm rec

If TXD changes to dominant (low) state but RXD signal does not follow within 40 µs, the

transmitter is disabled and this bit is set.

VCCFail

VCCFail:

VCC < 2 V for more than 2 µs

VS undervoltage detected

If an over/under voltage event is detected, the outputs are

disabled and one of these bits is set.

If the OVUVR bit is 0, the outputs are enabled automatically after

an over/under voltage event and the UV/OV bit is reset.

If the OVUVR bit is 1, the outputs are enabled after clearing the

UV/OV bit by SPI command (read and clear operation)

VS overvoltage detected

WDTIM1

Watchdog state:

Display which part of the total WD time (100 ms) has been elapsed:

WDTIM0

ECFDHSOC

Overcurrent diagnosis:

In case of an overcurrent event on ECFDHS the status bit is set and the output driver is disabled.

ECFDHSOL

The open-load detection monitors the load current in the ECFDHS. If the load current is below the

under current detection threshold for at least tdOL = 2 ms, the open-load bit is set.

ECVNR

ECV voltage not reached

Two comparators monitor the voltage at pin ECV in electrochrome

mode. If this voltage is below / above the programmed target,

these bits signal the difference after at least 32 µs. The bits are

not latched and may toggle after at least 32 µs, if the ECV voltage

has not yet reached the target.

ECVO

ECV voltage too high

TSD2

Thermal shutdown 2 (> 160 °C)

TSD1

Thermal shutdown 1 (> 150 °C)

Thermal warning (> 140 °C)

WDTIM1

WDTIM0

Elapsed time

< 1/3 of the total WD time

< 2/3 of the total WD time

< 3/3 of the total WD time

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