L99UDL01 datasheet(38/88 Pages) STMICROELECTRONICS

38 / 88 page

Electrical characteristics

L99UDL01

38/88

DS12511 Rev 5

4.3.10

I/O and SPI

Table 15. I/O Parameters, CLK, SDO, SDI, CSN, EN_OUT, DOUT

Electrical characteristics (-40°C < TJ < 130°C, 6V < VS < 18V unless otherwise specified)

Req ID

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

B.001

VIL

Input Low Voltage

CLK, SDI, CSN, EN_OUT

1.0

1.45

B.002

VIH

Input High voltage

CLK, SDI, CSN, EN_OUT

1.85

2.3

B.003

VI(HYST)

Input Threshold

Hysteresis

CLK, SDI, CSN, EN_OUT

0.2

0.4

B.004

tEN

EN_OUT filter time

Rising and falling edge of

EN_OUT

Tested by scan

s

B.005

tCSN_EN

Output enable delay

from rising edge of

CSN

CSN rising on command

high

Tested by scan

s

B.006

Rpu_csn

CSN pull up

resistance

140



B.007

Rpd_EN_OUT

EN_OUT pull down

resistance

VEN_OUT = 1.5V



B.008

IPD_SDI

Pull down current

VSDI = 1V

A

B.009

IPD_CLK

Pull down current

VCLK = 1V

A

B.010

IDOLK

Tri-state SDO

leakage current

0V < VDO < VDD, VCSN=VDD

-10

A

B.011

CDO

Tri-state SDO input

capacitance

Guaranteed by design

B.012

VOL

SDO, DOUT Output

low voltage

IOUT<4mA,

0.5

B.013

tCSN

CSN Timeout

CSN held low

B.014

VOH

SDO, DOUT Output

high voltage

IOUT<4 mA,

VDD-

0.5

VDD

B.015

fIN

Signal Frequency

Range

IOUT<25 µA, CL<60 pF

MHz

B.016

trise

CLK, SDI, CSN rise

time

B.017

tfall

CLK, SDI, CSN fall

time

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