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L99UDL01 Fiches technique(PDF) 17 Page - STMicroelectronics |
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L99UDL01 Fiches technique(HTML) 17 Page - STMicroelectronics |
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17 / 88 page ![]() DS12511 Rev 5 17/88 L99UDL01 Device description 87 Commanding the outputs then requires: 1. Register 00H: a) Set the polarity of the internal switches (HS/LS) 2. Register 01H: a) Set the polarity of the external switches (HS/LS) 3. Initiate the timed actuation: a) If by SPI, then the OUT_ON bit may be set in register 01H. This can be done concurrently with programming register 01H (step 2 above) as long as the EN_OUT pin is high. b) If initiating timed actuation by the EN_OUT pin then raise the EN_OUT pin. Timed actuation will occur as long as the EN_OUT pin is high. The unregulated side is protected by the overcurrent protection. All outputs, internal and external, are driven with active circuitry. If indefinite dynamic braking is not enabled, once an actuation cycle is completed and all devices have been commanded off, the active circuitry is disabled after ~10 µs to reduce quiescent loading. All outputs are then in a passive off state that will keep the outputs off (gates tied to their sources) in the face of noise on the load or supply. If indefinite braking is enabled, then the active circuitry will remain active for all outputs (even if dynamic braking is disabled for that output). 2.4.1 Integrated half bridge drivers (OUT1-OUT6) These outputs are configured as switching drivers incorporating active recirculation to minimize power dissipation. The dead time between high and low side drivers is fixed within the functionality of the output drivers. Figure 4. OUT1-6 block diagram All the integrated outputs can be driven in timed voltage control (PWM duty cycle), timed current regulation control or on/off control. GNDx OUTx VSx Prog. Current Threshold Vcp Vcp Diagnostics |
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