L99UDL01 datasheet(22/88 Pages) STMICROELECTRONICS

22 / 88 page

Device description

L99UDL01

22/88

DS12511 Rev 5

Paralleled outputs have all their current regulation, protection, and diagnostic information

tied together. Once a set of outputs are grouped then the master registers are used to

command and diagnose that group. The master registers are output 1 for outputs 1 through

3 and output 4 for outputs 4 through 6.

When paralleling multiple half bridges all the channels in the group will provide the current

monitoring for the master current regulation loop.

Current values programmed for each channel in the group are added to create the total

current for the group. Each output can have different values (for ex; 1 A for ch1 and 1.2 A for

ch2 to generate 2.2 A total current regulation for the group). The Slave outputs must be

programmed as current regulating when using current regulation.

PWM values will be taken from the master registers only. The remaining slave registers will

be ignored when in PWM mode. The Slave outputs must be programmed as PWM when

using PWM mode.

All diagnostics in a group must be cleared prior to restarting that group. For grouped

outputs, only the Master registers (OUT1 or OUT 4) contain the correct fault information for

their respective groups. Any diagnostic information must be gleaned from the Master. Slave

registers may or may not indicate faults.

2.4.6

Output override

The outputs can be driven directly, outside of a timed actuation, by the use of the Output

Override bits (OUTx_on, EX_OUTx_on in register 01H). When any of these bits are high

then the corresponding output(s) will be enabled according to the configuration settings

(polarity only). Overridden outputs are fully protected. Emergency Override affects the

protections for overridden outputs in the same manner as timed outputs.

The overridden outputs will not current regulate nor will they be affected by a timed

actuation.

Overridden outputs must not be modified (on, off, or polarity) at the initialization of

(OUT_ON=1) or during a timed actuation unless an emergency override is enabled.

Indefinite dynamic braking must be disabled prior to change any of the output override bits

(OUTx_on and EX_OUTx_on in register 01H) or any of the overridden output polarities

L99UDL01 Fiches technique(PDF) 22 Page - STMicroelectronics