L99UDL01 datasheet(54/88 Pages) STMICROELECTRONICS

54 / 88 page

Programmers guide

L99UDL01

54/88

DS12511 Rev 5

Programmers guide

This programmer’s guide is a reference section intended to help in the L99UDL01 interface

software development. The L99UDL01 uses SPI messaging for all its communication into or

out the device. The Command registers are written to the L99UDL01 by the MASTER

C

and the corresponding Status registers are read from the L99UDL01 by the MASTER

C.

6.1

Output Control Registers

The control registers are registers written to the L99UDL01 by the MASTER

µC to actuate

the L99UDL01 outputs. Each command consists of an address, data bits, and a parity bit.

The information written to these registers can either set up or initiate the lock/unlock

functionality. The outputs are set up for actuation or can be actuated by these registers.

All writable registers can be written while the device is in timed actuation mode, but not all

the data. New information placed in registers 00H through 05H while in timed actuation

mode will not be acted upon until after a timed actuation mode is completed. If these

registers are written during a timed actuation mode, their contents will be used on a

subsequent actuation. Register 06H through 08H are acted upon immediately after the

rising edge of CSN.

The device does not support any changes to the output override function during a timed

actuation. It means that the output override bits in registers 01H as well as the related output

control bits in register 00H must not be modified during a timed actuation. Further, Output

Override bits in register 01H cannot be changed while the OUT_ON bit is high. This action is

not supported.

6.1.1

This register sets up the polarity of the integrated outputs upon actuation. These values will

remain in this register even after actuation.

This register also sets up the PWM frequency for the integrated drivers using 3 bits.

This register can be read or written at any time. New data are not acted upon if programmed

while in timed actuation. New data will be used in subsequent timed actuations.

Figure 16. Register 00H Integrated output commands

OC1

OC2

D 15

D 14

D 13

D 12

D 11

D 10

D 9

D 8

D 7

D 6

D 5

D 4

D 3D 2

D 1D 0

000000

Default Values

0000000000

00000

Table 27. 00H Command description

Bit#

Command

Description

FPWM2

PWM Frequency selection bit 2

FPWM1

PWM Frequency selection bit 1

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