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L99UDL01 Fiches technique(PDF) 21 Page - STMicroelectronics |
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L99UDL01 Fiches technique(HTML) 21 Page - STMicroelectronics |
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21 / 88 page ![]() DS12511 Rev 5 21/88 L99UDL01 Device description 87 2.4.2 External FET controllers The external FET controllers are designed to be drivers for MOSFETS configured as half bridges. Alternatively, each half bridge controller may be configured as a single high-side driver or a single low side MOSFET controller. These outputs are not intended to be PWMmed and are limited in their switching speed to aid in reducing EMC issues. The external MOSFETS are protected by a programmable drain to source voltage (VDS) monitor. Both the voltage threshold and reaction delay are programmable. The default setting is 1 V for 1 µs. In the event of a Drain-Source fault the appropriate fault bit will be set as well as a fault bit in the Global Status Byte. A faulted driver will be switched off and is enabled again only after clearing fault bit (register 11H). Since these outputs are not intended to be PWMmed there is no active recirculation option. The external MOSFET control has off-state diagnostic capability as well. The external MOSFETs can be driven in timed on/off control or purely on/off control. External MOSFET dead time control At the end of every timed actuation all outputs are pulled to ground for the off-time duration as determined in the control register 02H. This requires that the external H-Bridge controller have a dead time between when the high side MOSFET is commanded off and when the low side MOSFET is commanded on. This is a fixed value set to tDT (6 µs). 2.4.3 DOUT The Data OUT pin may provide the host processor with real time fault indication. The GSBN (Global Status Bit NOT) bit may be reflected on this pin when this feature is enabled. This feature may be enabled by setting the Global Fault Indication (GFI) bit found in the control register 03H (bit7). 2.4.4 EN_OUT The output Enable pin has three states: It enables the output functionality while held high, and disables the outputs when held low. This pin can also be used to initiate an output timed actuation, based on programmed parameters, on a rising edge. There is a filter time on the rising edge of EN_OUT of tEN. This is used to prevent noise from accidentally actuating a timed actuation. 2.4.5 Paralleling outputs Up to three of the integrated outputs can be paralleled in two groups for the purpose of sharing higher current loads. Some of the possible combinations: 2 groups of 3 2 groups of 2 and 2 single outputs 1 group of 2, 1 group of 3 and a single output 1 group of 3, and 3 single outputs 1 group of 2, and 4 single outputs 6 single outputs, no groups |
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