L99UDL01 datasheet(49/88 Pages) STMICROELECTRONICS

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DS12511 Rev 5

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L99UDL01

Serial communications

Burst Read bit <BR>

The SPI Burst Read bit indicates if a burst read operation is implemented.(See Burst Read).

This bit is set.

SPI Data Length <DLx>

The SPI Data Length value indicates the counts the SCK count monitor requires for valid

accesses to the Device Application Registers. In case a communication frame with an SCK

count is not equal to that value (24 for the L99UDL01) SPI Error will be reported and the

data will be rejected.

The Frame Length is specified using 3 bits. The L99UDL01 has a 24 Bit SPI using a 16 Bit

payload (0,1,0).

Data consistency check (Parity/CRC)

For some devices a Data Consistency Check is required. Therefore either a parity-check or

for very sensitive systems a CRC may be implemented.

It is defined on 2 bits, in SPI Mode register located in ROM Part. A check is then applied on

the incoming frame (SDI) while a calculation elaborated on one/multiple bits is done and

integrated on the outgoing frame (SDO). The L9UDL01 uses standard odd parity.

Table 23. SPI data length

Bit 6

DL2

Bit 5

DL1

Bit 4

DL0

Description

Invalid

16 Bit SPI (8 Bit payload)

24 Bit SPI (16 Bit payload)

...

64 Bit SPI (56 Bit payload)

Table 24. Data consistency bit definition

Bit 1

Bit0

Description

Not used

Odd parity used

CRC used

Invalid

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