SC3200 datasheet(239/447 Pages) AMD

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SC3200 Fiches technique(PDF) 239 Page - Advanced Micro Devices

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AMD Geode™ SC3200 Processor Data Book

239

Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0

Revision 5.1

Codec SDATA_IN SMI Status. Indicates whether or not an SMI was caused by AC97 Codec producing a positive edge on

SDATA_IN.

0: No.

1: Yes.

To enable SMI generation, set F0 Index 80h[5] = 1.

RTC Alarm (IRQ8#) SMI Status. Indicates whether or not an SMI was caused by an RTC interrupt.

0: No.

1: Yes.

This SMI event can only occur while in 3V Suspend and an RTC interrupt occurs and F1BAR1+I/O Offset 0Ch[0] = 0.

ACPI Timer SMI Status. Indicates whether or not an SMI was caused by an ACPI Timer (F1BAR0+I/O Offset 1Ch or

F1BAR1+I/O Offset 1Ch) MSB toggle.

0: No.

1: Yes.

To enable SMI generation, set F0 Index 83h[5] = 1.

Index F8h-FFh

Reserved

Reset Value: 00h

Table 6-29. F0: PCI Header/Bridge Configuration Registers for GPIO and LPC Support (Continued)

Bit

Description

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