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MM32F103CET Fiches technique(PDF) 73 Page - MindMotion Microelectronics |
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MM32F103CET Fiches technique(HTML) 73 Page - MindMotion Microelectronics |
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73 / 89 page ![]() DS_MM32F103xx_o_Ver1.13 Electrical characteristics 5.3.16 CAN (controller area network) interface Refer to subsubsec 5.3.12 for more details on the input/output alternate function charac- teristics (CAN_TX and CAN_RX). 5.3.17 12-bit ADC characteristics Unless otherwise specified, The parameters in the table below are measured using the ambient temperature, fPCLK2 frequency and VDDA supply voltage in accordance with the conditions of Table 10. Note: It is recommended to perform a calibration after each power-up Table 40. ADC characteristics Symbol Parameter Conditions Min Type Max Unit VDDA Supply voltage 2.5 5 5.5 V VREF+ Positive reference voltage VDDA V fADC (1)(3) ADC clock frequency 15 MHz fS (1)(3) Sampling rate 1 MHz fTRIG (1) External trigger frequency fADC = 15MHz 833 KHz 18 1/fADC VAIN (2) Conversion voltage range 0 (VSSA or VREF− connected to ground) VREF+ V RAIN (1) External sample and hold capactor See Formulas 1 and Table 41 kΩ RADC (1) Sampling switch resistance 0.75 kΩ CADC (1) Internal sample and hold capacitor 10 pF tS (1) Sampling time fADC = 15MHz 0.1 16 µs 1.5 239.5 1/fADC tSTAB (1) Stabilization time 1 µs tconv (1) Total conversion time (including Sampling time) fADC = 15MHz 1 17.44 µs 15 ∼ 253 (sampling t S+ ) stepwise approximation 13.5 1/fADC 1. Guaranteed by design. Not tested in production. 2. In this series of products, VREF+ is internally connected to DDA,VREF− is internally connected to SSA. 3. fADC Maximum support 15MHz,fS Maximum support 1MHz (fPCLK2 = 60MHz,ADC Prescaler = 4,fADC = 15MHz, TS = 1.5) www.mm32mcu.com 67/83 |
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