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MM32F103CET Fiches technique(PDF) 65 Page - MindMotion Microelectronics |
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MM32F103CET Fiches technique(HTML) 65 Page - MindMotion Microelectronics |
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65 / 89 page ![]() DS_MM32F103xx_o_Ver1.13 Electrical characteristics 1. TIMx is a generic name, representing TIM4. 5.3.15 Communication interfaces I2C interface characteristics Unless otherwise specified, the parameters given in Table 35 are derived from tests per- formed under the ambient temperature, fPCLK1frequency and supply voltage conditions summarized in Table 10: General operating conditions. The I2C interface conforms to the standard I2C communication protocol, but has the fol- lowing limitations: SDA and SCL are not true pins. When configured as open-drain output, the PMOS transistor between the pin and VDD Was closed but still exists. The I2C I/Os characteristics are listed in Table 35, the alternate function characteristics of I/Os (SDA and SCL) refer to subsubsec 5.3.12. Table 35. I2C characteristics Symbol Parameter Standard I2C(1) Fast I2C (1)(2) Unit Min Max Min Max tw(SCLL) SCL clock fall time 4.7 1.3 µs tw(SCLH) SCL clock rise time 4.0 0.6 µs tsu(SDA) SDA setup time 250 100 ns th(SDA) SDA data hold time 0(3) 0(4) 900(3) tr(SDA) tr(SDL) SDA and SCL rise time 1000 2.0+0.1Cb 300 tf(SDA) tf(SDL) SDA and SCL fall time 300 300 th(STA) Start condition hold time 4.0 0.6 µs tsu(STA) Start condition setup time 4.7 0.6 tsu(STO) Stop condition setup time 4.0 0.6 tw(STO:STA) Time from Stop condition to Start condition 4.7 1.3 Cb Capacitive load of each bus 400 400 pF 1. Guaranteed by design, not tested in production. 2. fPCLK1must be at least 3MHz to achieve standard mode I2C frequencies. It must be at least 12MHz to achieve fast mode I2C frequencies. 3. The maximum Data hold time has only to be met if the interface does not stretch the low period of SCL signal. 4. In order to span the undefined area of the falling edge of SCL, it must ensure that the SDA signal has a hold time of at least 300nS. www.mm32mcu.com 59/83 |
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