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MM32F103CET Fiches technique(PDF) 59 Page - MindMotion Microelectronics |
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MM32F103CET Fiches technique(HTML) 59 Page - MindMotion Microelectronics |
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59 / 89 page ![]() DS_MM32F103xx_o_Ver1.13 Electrical characteristics Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test conforms to the JESD22-A114/C101 standard. Static latch-up Two complementary static tests are required on six parts to assess the latch-up perfor- mance: • A supply overvoltage is applied to each power supply pin • A current injection is applied to each input, output and configurable I/O pin These tests are compliant with EIA/JESD78A IC latch-up standard. Table 29. ESD characteristics Symbol Parameter Conditions Type Max Unit VESD(HBM) Electrostatic discharge voltage (Human body model) TA = +25◦C, Conforming to JESD22-A114 2000 V VESD(CDM) Electrostatic discharge voltage (Charging device model) TA = +25◦C, Conforming to JESD22-C101 500 ILU Latch-up current TA = +25◦C,Conforming to JESD78A 200 mA 5.3.12 I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 7 are derived from tests. Table 30. I/O static characteristics Symbol Parameter Conditions Min Typ Max Unit VIL Low level input voltage CMOS Port -0.5 1.1 V VIH High level input voltage CMOS Port 2.08 V Vhys Schmitt trigger hysteresis(1) 500 700 800 mV Ilkg Input leakage current(2) 1 µA RPU Weak pull-up equivalent resistor(3) VIN = VSS 30 50 100 kΩ RPD Weak pull-down equivalent resistor(3) VIN = VDD 30 50 100 www.mm32mcu.com 53/83 |
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