L9300 datasheet(36/178 Pages) STMICROELECTRONICS

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Table 14. Decoding start/stop behaviour

Sensor condition

Decoding start

Decoding stop

Normal speed

28 mA pulse with tp

Rising edge of 28 mA pulse or no modulation is performed for 5/4*tp

High speed

28 mA pulse with tp

Rising edge of 28 mA pulse

Stand still

14 mA pulse with tp

No modulation is performed for 5/4*tp

Wheel Speed data register formats

In the wheel speed sensor interface, four data registers are used (Remote Sensor Data Register WSIRSDR0-

WSIRSDR3).

Independent data registers are defined for each wheel speed channel and their contents are determined by

sensor type. Three level VDA sensors have eight data bit (stored in WSIRSDRx registers) and parity check

performed at device level, in case parity check fails an error flag is set in WSIRSDRx register. At fast speed, the

sensor may not transmit all bits: the ASIC is able both to process normal or either truncated frames by providing

together with data, a 4-bit counter to inform the microcontroller about the number of received valid bits. For PWM

encoded sensors, each pulse length is written to the sensor data register with a typical resolution of 5 μs per bit.

In case of pulse width duration equal to or higher than 1.045 ms and less than or equal to 2.55 ms, the standstill

condition will be recognized. The register is updated when a PWM falling edge is detected; in case of stuck-at 1 of

the PWM signal the register is updated when the counter reaches the overflow value (0x1FF): in this case the

standstill bit not set and the counter in overflow will signal a fault to the microcontroller in WSIRSDR register. No

data are available for STD sensors.

Sensor data integrity: LCID and CRC

WSIRSDR[3:0] data register contains a Logical Channel ID which is a 2-bit field for remote sensors used to link

the received data to the corresponding logical channel number. WSIRSDR[3:0] register also contain a 3-bit CRC

field computed on the data packet for data integrity check. To satisfy functional safety requirements LCID, DATA

and CRC bit fields propagate through the same data path as a single item to the SPI output. The CRC checksum

can also be evaluated using a polynomial approach with the following parameters for the algorithm:

•

Polynomial G3(x) = x3+x+1, whose hexadecimal equivalent code is “0xB”;

•

Number of CRC bit: 3;

•

Initial seed: all ones;

•

Input word length: 17 bit;

•

LSB first;

•

Additional left shift number: 3.

Test mode

In order to test the connection between IC and microcontroller, the device features a wheel speed test mode that

allows test patterns to be applied on the four wheel speed outputs DOUTx. The test mode can be entered via SPI

and the test patterns can also be controlled via SPI commands. Test patterns can be composed only of static high

or low signals, which can be selected via SPI. For safety reasons only one channel at a time can be switched into

test mode.

Remote sensor interface fault protection

Short to GND, current limit

Each output is short circuit protected by an independent current limit and a thermal detection circuit. In case the

output current level reaches or exceeds the ILIMTH for a time period greater than TILIMTH and meanwhile the

remote sensor interface thermal protection is triggered the output stage is disabled. In case the thermal warning

level would not be reached, the current limitation circuitry will prevent damages on the channel, still while

operating the output. An internal up-down counter will count in 25 µs increment up to TILIMTH. The filter time is

chosen in order to avoid false current limit detection for in-rush current that may happen at interface switch-on.

When the output is turned off due to current limit, the appropriate fault code is set in the Remote Sensor Fault Bits

(FLTBIT). The fault timer latch is cleared when the satellite channel is switched off then re-enabled through the

Remote Sensor Configuration Register (WSIRSCR). This fault condition does not interfere with the normal

operation of the IC, nor with the operation of the other channels.

Short to Battery

L9300

Power supply

DS12258 - Rev 5

page 36/178

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