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L9300 Fiches technique(PDF) 89 Page - STMicroelectronics |
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L9300 Fiches technique(HTML) 89 Page - STMicroelectronics |
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89 / 178 page ![]() Figure 59. Answer check generation algorithms block diagram Seed 0 1 2 3 4 5 6 7 -Seed 0 1 2 3 4 5 6 7 Answer high 0 1 2 3 4 5 6 7 Answer low 0 1 2 3 4 5 6 7 GADG0408171328PS The answer is a 16-bit wide word checked against a 16-bit word composed by two bytes, Answer_Low and Answer_High, generated from the seed sent. Answer_Low is the logical 2’s complement of the seed while Answer_High is a replica of the seed sent. 14.2 Q&A watchdog SPI registers When a Read operation is performed, a new seed is sent and the read is treated as a new Seed request. When an Answer write is not treated as a new Seed request and the seed related to that answer is sent back. 14.2.1 Register unlock procedure All the SPI parameters can be programmed before the WD mechanism starts. After the first seed request, the registers are locked to prevent from unexpected modification by the µC. To modify the register, µC must send an unlock key. After the key is received a register can be modified. After the first SPI write access (to any address) received after the Unlock key, registers are automatically locked. Unlock_Cmd = 20’h0f0f0 Example 1 : Example of unlock usage: To change the WD Req Timings and Answ Timing while WD is working WD is running → All the WD config registers are locked Unlock_Cmd is received → Lock is removed Write Access to WD Req Timing register → WD Req Timing updated → All the WD config registers are automatically locked Unlock_Cmd is received → Lock is removed Write Access to WD Answ Timing register → WD Ans Timing updated → WD config registers are automatically locked L9300 Q&A Watchdog DS12258 - Rev 5 page 89/178 |
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