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L9300 Fiches technique(PDF) 94 Page - STMicroelectronics |
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L9300 Fiches technique(HTML) 94 Page - STMicroelectronics |
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94 / 178 page ![]() Symbol Parameter Test condition Min Typ Max Unit Pin CIN_DIF Differential internal capacitance Guaranteed by design 10 pF CANH, CANL VTHDOM Differential receiver threshold voltage recessive to dominant state Active mode 0.9 V CANH, CANL VTHDOMLP Differential receiver threshold voltage recessive to dominant state (low power mode) Stby mode, CONFIG = 16 V 1.15 V CANH, CANL VTHREC Differential receiver threshold voltage dominant to recessive state Active mode 0.5 V CANH, CANL VTHRECLP Differential receiver threshold voltage dominant to recessive state (low power mode) Stby mode, CONFIG=16 V 0.2 V CANH, CANL CAN Transmitter Timings tTxPD_HL Propagation delay TXDC to RXDC (High to Low) Active mode; 50%VTXDC to 50% VRXDC; CRXDC=100 pF; RL = 60 Ω 0 255 ns CANH, CANL tTxPD_LH Propagation delay TXDC to RXDC (Low to High) Active mode; 50%VTXDC to 50% VRXDC; CRXDC = 100 pF; RL = 60 Ω 0 255 ns CANH, CANL tWUF Wake up filter time Guaranteed by scan 0.5 5 µs CANH, CANL tTXDC_DOM_TO TXDC dominant time-out Guaranteed by scan 800 1280 µs CANH, CANL tCAN_DOM_TO CAN permanent dominant time-out Guaranteed by scan 800 1280 µs CANH, CANL tTHSd State transition time Measured between 10% to 90% 10 64 80 ns CANH, CANL tTHSr State transition time Measured between 10% to 90% 10 16 80 ns CANH, CANL L9300 CAN Interface DS12258 - Rev 5 page 94/178 |
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