L9300 datasheet(27/178 Pages) STMICROELECTRONICS

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Symbol

Parameter

Test condition

Min

Typ

Max

Unit

VDD3_OV_ft

VDD3_SEL overvoltage

filter time

Guaranteed by scan

µs

VDD3_SEL

1. If VDRAIN is supplied by VDD1, the value of the optional filtering capacitor must be chosen taking into account VDD1 current limitation

value vs in-rush current during regulator power-up and supply transients.

8.3.3

VDD3 error handling

Table 11. VDD3 type errors

Type of error

Detection

condition

Action

Clear SPI flag

Restart condition

VDD3 under voltage

ON state

RES1, RES2 driven low. VDD3 UNDER VOLTAGE SPI

flag (6) latched in SERVFLT register

On read

Automatic after fault

disappears

VDD3 over voltage

ON state

RES1, RES2 driven low. VDD3 OVER VOLTAGE SPI

flag (8) latched in SERVFLT register

On read

Automatic after fault

disappears

8.4

VDD4

8.4.1

VDD4 functional description

VDD4 is a linear regulator that can work with an external N-channel FET. An external feedback resistor sets the

output voltage of the regulator.

To configure VDD4 to work as a linear regulator, the VDD4_SH pin has to be left floating; the configuration

(VDD4_SH connected to supply line or open) is latched after VDD1 has reached. VDD_st_en threshold to avoid

wrong configuration detection during battery ramp-up. When used in linear configuration the unused pins can be

left floating (alternatively VDD4_BTS can be shorted with VDD4S to the source of external FET). Echo of the

latched configuration is available in SPI registers.

Dedicated monitors are present on VDD4_SEL pin to detect VDD4 undervoltage and overvoltage conditions;

voltage monitors are not masked during the power-up phase.

Figure 13. VDD4 regulator linear configuration

VCP

Driver

loop

Control

Linear

VDD3

R4dw

R4up

VDRAIN

VDD4_SEL

VDD4

VDD4_G

GADG1007171442PS

VDRAIN can be connected to either VBATP or, in order to limit power consumption, to a preregulated voltage.

8.4.2

VDD4 electrical characteristics

5.5 V ≤ VBATP ≤ 19 V; 5.5 V ≤ VDRAIN ≤ 19 V; -40 °C ≤ Tj ≤ 175 °C unless otherwise noticed. All voltages refer

to GND pin. STD20NF06L used as test reference for external MOS.

L9300

Power supply

DS12258 - Rev 5

page 27/178

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