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EMC2302 Fiches technique(PDF) 14 Page - Microchip Technology

No de pièce EMC2302
Description  Single/Multiple RPM-Based PWM Fan Controller
PDF  70 Pages
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Fabricant  MICROCHIP [Microchip Technology]
Site Internet  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

EMC2302 Fiches technique(HTML) 14 Page - Microchip Technology

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EMC2301/2/3/5
DS20006532A-page 14
 2021 Microchip Technology Inc.
4.2
PWM Fan Driver
The EMC2301/2/3/5 supports up to five PWM output
drivers. Each output driver can be configured to oper-
ate as an open-drain (default) or push-pull driver and
can be configured with normal or inverse polarity (see
Register 6-8).
Additionally, the PWM frequencies are independently
programmable with ranges from 9.5 Hz to 26 kHz in
four programmable frequency bands shown in Table 4-
2 (see Register 6-9 and Register 6-10).
The frequency of the PWM drive can further be tuned
through the PWM Frequency Divide Registers (see
Register 6-12). The 8-bit value stored in this register
divides the base frequency, allowing the 9.5 Hz PWM
frequency to be generated from the 2441 Hz Base Fre-
quency. A value of 00h or 01h in the PWM Frequency
Divide Register is decoded as 01h.
4.3
RPM-Based Fan Speed Control
Algorithm
The EMC2301/2/3/5 includes up to five RPM-based
Fan Speed Control algorithms. Each algorithm oper-
ates independently and controls a separate fan driver.
Each algorithm is controlled manually (by setting the
target fan speed).
This fan control algorithm uses proportional, integral,
and derivative terms to automatically approach and
maintain the system’s desired fan speed to an accu-
racy directly proportional to the accuracy of the clock
source.
The desired tachometer count is set by the user input-
ting the desired number of 32.768 kHz cycles that
occur per fan revolution. This is done by manually set-
ting the TACH Target Register. The user may change
the target count at any time. The user may also set the
target count to FFh in order to disable the fan driver for
lower current operation.
For example, if a desired RPM rate for a 2-pole fan is
3000 RPM, then the user would input the hexadecimal
equivalent of 1296 (51h in the TACH Target Register).
This number represents the number of 32.768 KHz
cycles that would occur during the time it takes the fan
to complete a single revolution when it is spinning at
3000 RPM.
The EMC2301/2/3/5’s RPM-based Fan Speed Control
algorithm has programmable configuration settings for
parameters such as ramp-rate control and spin up con-
ditions. The fan driver automatically detects and
attempts to alleviate a Stalled/Stuck fan condition while
also asserting the ALERT pin. The EMC2301/2/3/5
works with fans that operate up to 16000 RPM and
provide a valid tachometer signal.
The fan controller will function either with an externally
supplied 32.768 kHz clock source or with its own inter-
nal 32 kHz oscillator depending on the required accu-
racy. The EMC2301/2/3/5 offers a clock output that
enables additional devices to be set as clients to the
same clock source.
The update rate of the PID loop and Ramp Rate Con-
trol is controlled by the Fan Configuration 1 and 2 Reg-
isters settings (see Register 6-13 and Register 6-14).
The values for the Update Time settings in the Fan
Configuration 1 register are shown in Table 4-3.
TABLE 4-1:
FAN CONTROLS ACTIVE FOR
OPERATING MODE
Direct Setting Mode
FSC Mode
Fan Driver Setting
(Read/Write)
Fan Driver Setting
(Read Only)
EDGES[1:0]
EDGES[1:0]
(Fan Configuration)
RANGE[1:0]
(Fan Configuration)
UPDATE[2:0]
(Fan Configuration)
UPDATE[2:0]
(Fan Configuration)
LEVEL
(Spin Up Configuration)
LEVEL
(Spin Up Configuration)
SPINUP_TIME[1:0]
(Spin Up Configuration)
SPINUP_TIME[1:0]
(Spin Up Configuration)
Fan Step
Fan Step
Fan Minimum Drive
Valid TACH Count
Valid TACH Count
TACH Target (Read/Write)
TACH Reading
TACH Reading
DRIVE_FAIL_CNT[1:0]
and Drive Band Fail
Registers
TABLE 4-2:
PWM_BASEX BIT DECODE
PWM_BASEX[1:0]
Base Frequency
10
00
26.00 kHz (default)
01
19.531 kHz
10
4.882 kHz
11
2.441 kHz
TABLE 4-3:
UPDATE TIME
UPDATEX[2:0]
Update
Time
21
0
00
0
100 ms
00
1
200 ms
01
0
300 ms
01
1
400 ms
(default)
10
0
500 ms



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