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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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EMC2302 Fiches technique(PDF) 28 Page - Microchip Technology |
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EMC2302 Fiches technique(HTML) 28 Page - Microchip Technology |
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28 / 70 page  EMC2301/2/3/5 DS20006532A-page 28 2021 Microchip Technology Inc. 6.1 Data Read Interlock When any temperature channel high byte register is read, the corresponding low byte is copied into an inter- nal ‘shadow’ register. The user is free to read the low byte at any time and be guaranteed that it will corre- spond to the previously read high byte. Regardless if the low byte is read or not, reading from the same high byte register again will automatically refresh this stored low byte data. During Power-on Reset (POR), the default values are stored in the registers. A POR is initiated when power is first applied to the part and the voltage on the VDD supply surpasses the POR level as specified in the electrical characteristics. Any reads to undefined regis- ters will return 00h. Writes to undefined registers will not have an effect. The Lock column in Table 6-1 describes the locking mechanism, if any, used for individual registers. All SWL registers are Software Locked and therefore made read-only when the LOCK bit is set. Fan 5 Drive Fail Band Low Byte 7Ah F5DF4 F5DF3 F5DF2 F5DF1 F5DF0 — — —SWL 00h Fan 5 Drive Fail Band High Byte 7Bh F5DF12 F5DF11 F5DF10 F5DF9 F5DF8 F5DF7 F5DF6 F5DF5 SWL 00h TACH 5 Target Low Byte 7Ch F5TT4 F5TT3 F5TT2 F5TT1 F5TT0 — — —No F8h TACH 5 Target High Byte 7Dh F5TT12 F5TT11 F5TT10 F5TT9 F5TT8 F5TT7 F5TT6 F5TT5 No FFh TACH 5 Reading High Byte 7Eh F5TR12 F5TR11 F5TR10 F5TR9 F5TR8 F5TR7 F5TR6 F5TR5 No FFh TACH 5 Reading Low Byte 7Fh F5TR4 F5TR3 F5TR2 F5TR1 F5TR0 — — —No F8h Software Lock EFh — — — — — — —LOCK No F8h Product Features (EMC2305 and EMC2303 only) FCh — — ADR2 ADR1 ADR0 FSP2 FSP1 FSP0 No 00h Product ID (EMC2305) FDh PID7PID6PID5PID4PID3PID2PID1PID0 No 34h Product ID (EMC2303) FDh PID7PID6PID5PID4PID3PID2PID1PID0 No 35h Product ID (EMC2302) FDh PID7PID6PID5PID4PID3PID2PID1PID0 No 36h Product ID (EMC2301) FDh PID7PID6PID5PID4PID3PID2PID1PID0 No 37h Manufacturer ID FEh MID7 MID6 MID5 MID4 MID3 MID2 MID1 MID0 No 5Dh Revision FFh REV7 REV6 REV5 REV4 REV3 REV2 REV1 REV0 No 80h TABLE 6-1: REGISTER SET IN HEXADECIMAL ORDER (CONTINUED) Register Name Reg. Addr. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Lock POR Value |
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