EMC2302 datasheet(22/70 Pages) MICROCHIP

22 / 70 page

EMC2301/2/3/5

DS20006532A-page 22

 2021 Microchip Technology Inc.

5.3

SMBus Data Bytes

All SMBus Data bytes are sent Most Significant bit first

and composed of 8 bits of information.

5.4

SMBus ACK and NACK Bits

The SMBus client will acknowledge all data bytes that

it receives (as well as the client address if it matches

and the ARA address if the ALERT pin is asserted).

This is done by the client device pulling the SMBus

Data line low after the 8th bit of each byte that is

transmitted. This applies to both the Write Byte and

Block Write protocols.

The Host will NACK (not acknowledge) the data byte to

be received from the client by holding the SMBus data

line high after the 8th data bit has been sent. For the

Block Read protocol, the host will ACK each data byte

that it receives except the last data byte.

5.5

SMBus Stop Bit

The SMBus Stop bit is defined as a transition of the

SMBus Data line from a logic ‘0’ state to a logic ‘1’ state

while the SMBus clock line is in a logic ‘1’ state. When

the EMC2301/2/3/5 detects an SMBus Stop bit, and it

has been communicating with the SMBus protocol, it

will reset its client interface and prepare to receive

further communications.

5.6

SMBus Time-Out

The EMC2301/2/3/5 includes an SMBus timeout fea-

ture. Following a 30 ms period of inactivity on the

SMBus, the device will time-out and reset the SMBus

interface.

The SMBus timeout feature is disabled by default and

can be enabled via clearing the DIS_TO bit in the

Configuration register (see Register 6-1).

5.7

SMBus and I2C Compliance

The major difference between SMBus and I2C devices

is highlighted

here. For complete compliance

information refer to the SMBus 2.0 specification.

Minimum frequency for SMBus communications

is 10 kHz (I2C has no minimum frequency).

The client protocol will reset if the clock is held

low for longer than 30 ms (I2C has no timeout).

The client protocol will reset if both the clock and

data lines are held high for longer than 150 µs.

I2C devices do not support the Alert Response

Address functionality (which is optional for

SMBus).

The Block Read and Block Write protocols are

only compliant with I2C data formatting. They do

not support SMBus formatting for Block Read

and Block Write protocols.

5.8

SMBus Protocols

The EMC2301/2/3/5 is SMBus 2.0 compatible and sup-

ports Send Byte, Read Byte, Block Read and Receive

Byte as valid protocols as shown below. The

EMC2301/2/3/5 also supports the I2C Block Read and

Block Write protocols. The device supports Write Byte,

Read Byte, and Block Read/Block Write. All of the

below protocols use the convention in Table 5-2.

5.9

SMBus Write Byte

The Write Byte is used to write one byte of data to the

registers, as shown in Table 5-3.

5.10

Block Write

The Block Write protocol is used to write multiple data

bytes to a group of contiguous registers as shown in

Table 5-4. It is an extension of the Write Byte protocol.

TABLE 5-2:

SMBUS PROTOCOL

Data Sent to Device

Data Sent to the Host

# of bits sent

TABLE 5-3:

WRITE BYTE PROTOCOL

CLIENT

ADDR.

REG.

ADDR.

REG.

DATA

1 → 0 YYYY_

YYY

XXh

0 XXh 00 → 1

Note:

When using the Block Write protocol, the

internal address pointer will be automati-

cally incremented after every data byte is

received. It will wrap from FFh to 00h.

TABLE 5-4:

BLOCK WRITE PROTOCOL

CLIENT

ADDR.

REG.

ADDR.

REPEAT

N TIMES

REG.

DATA

1 → 0 YYYY_

YYY

XXh

0 XXh 00 → 1

Note:

The Block Write and Block Read protocols

require that the address pointer be auto-

matically incremented. For a write com-

mand, the address pointer will be

automatically incremented when the ACK

is sent to the host. There are no over or

under bound limit checking and the

address pointer will wrap around from FFh

to 00h if necessary.

EMC2302 Fiches technique(PDF) 22 Page - Microchip Technology

EMC2302 Fiches technique(HTML) 22 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70

Fiches technique Télécharger

Lien URL