EMC2302 datasheet(45/70 Pages) MICROCHIP

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 2021 Microchip Technology Inc.

DS20006532A-page 45

EMC2301/2/3/5

6.22

TACH Target Registers

The TACH Target Registers hold the target tachometer

value that is maintained by the RPM-based Fan Speed

Control algorithm.

The value in the TACH Target Registers will always

reflect the current TACH Target value.

If one of the algorithms is enabled, setting the TACH

Target Register to FFh will disable the fan driver (set

the fan drive setting to 0%). Setting the TACH Target to

any other value (from a setting of FFh) will cause the

algorithm to invoke the Spin Up Routine after which it

will function normally.

The Tach Target is not applied until the high byte is

written. Once the high byte is written, the current value

of both high and low bytes will be used as the next Tach

target (see Section 4.4 “Tachometer Measure-

ment”). The contents of Register and Register 6-22

represent the weighting of each bit in determining the

final target tachometer value that is maintained by the

RPM-based FSC algorithm.

TACH TARGET - TACHOMETER CLOSED LOOP TARGET HIGH BYTE REGISTER

(ADDRESSES 3DH, 4DH, 5DH, 6DH, 7DH)

RW-0

FxTT[12:5]

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-0

FxTT[12:5]: Fan Drive Tach Target Counts, where “x” represents 1 through 5 based on device

features.

bit 7

4096

bit 6

2048

bit 5

1024

bit 4

512

bit 3

256

bit 2

128

bit 1

bit 0

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