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EMC2302 Fiches technique(PDF) 44 Page - Microchip Technology |
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EMC2302 Fiches technique(HTML) 44 Page - Microchip Technology |
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44 / 70 page ![]() EMC2301/2/3/5 DS20006532A-page 44 2021 Microchip Technology Inc. 6.21 Drive Fail Band Registers The Drive Fail Band registers store the number of tach counts used by the Fan Drive Fail detection circuitry. This circuitry is activated when the fan drive setting high byte is at FFh. When it is enabled, the actual mea- sured fan speed is compared against the target fan speed. These registers are only used when the FSC algorithm is active. This circuitry is used to indicate that the target fan speed at full drive is higher than the fan is actually capable of reaching. If the measured fan speed does not exceed the target fan speed minus the Fan Drive Fail Band register settings for a period of time longer than set by the DFCx[1:0] bits, then the DRIVE_FAIL status bit will be set and an interrupt generated (see Section 4.4.4 “Aging Fan or Invalid Drive Detec- tion”). The contents of Register 6-20 and Register 6- 21 represent the weighting of each bit in determining the final number of tach counts used by the Fan Drive Fail detection circuitry. REGISTER 6-20: DRIVE FAIL - DRIVE FAIL BAND HIGH BYTE REGISTER (ADDRESSES 3BH, 4BH, 5BH, 6BH, 7BH) RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 FxDF[12:5] bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-0 FxDF[12:5]: Drive Fail Band High Byte, where “x” represents 1 through 5 based on device features. bit 7 4096 bit 6 2048 bit 5 1024 bit 4 512 bit 3 256 bit 2 128 bit 1 64 bit 0 32 REGISTER 6-21: DRIVE FAIL - DRIVE FAIL BAND LOW BYTE REGISTER (ADDRESSES 3AH, 4AH, 5AH, 6AH, 7AH) RW-0 RW-0 RW-0 RW-0 RW-0 U-0 U-0 U-0 FxDF[4:0] — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-3 FxDF[5:0]: Drive Fail Band Low Byte, where “x” represents 1 through 5 based on device features. bit 7 16 bit 6 8 bit 5 4 bit 4 2 bit 3 1 bit 2-0 Unimplemented bits, read as ‘0’. |
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