PC87413 datasheet(46/257 Pages) NSC

46 / 257 page

3.0 Device Architecture and Configuration (Continued)

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Revision1.2

3.5

PROTECTION

The PC8741x devices provide features to protect the hardware configuration from changes made by application software

running on the host.

The protection is activated by the software setting a “sticky” lock bit. Each lock bit protects a group of configuration bits lo-

cated either in the same register or in different registers. When the lock bit is set, the lock bit and all the protected bits be-

come read only and cannot be further modified by the host through the LPC bus. However, for each lock bit there is an unlock

bit in the ACCESS.bus Interface (ACBLKCTL register; see Section 6.3.4 on page 128). Setting an unlock bit through the

ACCESS.bus resets the corresponding lock bit, thus releasing the locked configuration bits, which again become read/write

bits (PC87413 and PC87417).

In addition, all the lock bits are reset by power-up reset, thus unlocking the protected configuration bits. The VSBLOCK bit

in the ACBLKCTL register (see Section 6.3.4 on page 128; in PC87414 and PC87416, VSBLOCK is always ‘0’) selects

which power-up reset clears the lock bits: VDD Power-Up reset (or Hardware reset) or VSB Power-Up reset. Note that the

locked configuration bits are not reset by the selected power-up reset, unless the selected power-up reset corresponds with

the default reset defined for the power well of the locked configuration bits (see Section 2.2 on page 34).

The bit locking protection mechanism can be used optionally.

The protected groups of configuration bits are described below.

3.5.1

Multiplexed Pins Configuration Lock

Protects the configuration of all the multiplexed device pins.

Lock bit: LOCKMCF in SIOCF1 register (Device Configuration).

Unlock bit: UNLOCKM in ACBLKCTL register (ACCESS.bus Interface - PC87413 and PC87417).

Protected bits: DMAWAIT, IOWAIT in SIOCF1 register and all bits of the SIOCF2, SIOCF3, SIOCF4 and SIOCF5 registers

(Device Configuration).

3.5.2

GPIO Ports Configuration Lock

Protects the configuration (but not the data) of all the GPIO Ports.

Lock bit: LOCKGCF in SIOCF1 register (Device Configuration).

Unlock bit: UNLOCKG in ACBLKCTL register (ACCESS.bus Interface - PC87413 and PC87417).

Protected bits for each GPIO Port: All bits of the GPCFG1, GPEVR and GPCFG2 registers except the LOCKCFP bit (Device

Configuration).

3.5.3

Fast Disable Configuration Lock

Protects the Fast Disable bits for all the Legacy modules.

Lock bit: LOCKFDS in SIOCF6 register (Device Configuration).

Unlock bit: UNLOCKF in ACBLKCTL register (ACCESS.bus Interface - PC87413 and PC87417).

Protected bits: All bits of the SIOCF6 register, except the General-Purpose Scratch bits (Device Configuration).

3.5.4

Clock Generator Configuration Lock

Protects the Clock Generator configuration bits.

Lock bit: LOCKCCF in CLOCKCF register (Device Configuration).

Unlock bit: UNLOCKC in ACBLKCTL register (ACCESS.bus Interface).

Protected bits: All bits of the CLOCKCF register (Device Configuration).

3.5.5

GPIO Ports Lock

Protects the configuration and data of all the GPIO Ports.

Lock bit: LOCKCFP in GPCFG1 register, for each GPIO Port (Device Configuration).

Unlock bit: UNLOCKG in ACBLKCTL register (ACCESS.bus Interface - PC87413 and PC87417).

Protected bits for each GPIO Port: PUPCTL, OUTTYPE and OUTENA in GPCFG1 register; all bits of the GPCFG2 register

(Device Configuration); the corresponding bit (to the port pin) in the GPDO register (GPIO Ports).

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