PC87413 datasheet(34/257 Pages) NSC

34 / 257 page

2.0 Power, Reset and Clocks (Continued)

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Revision1.2

2.2

RESET SOURCES AND TYPES

The PC8741x devices have up to six reset sources:

• V

PP Power-Up Reset - activated when either VSB or VBAT is powered up after both have been off.

• V

SB Power-Up Reset - activated when VSB is powered up.

• V

DD Power-Up Reset - activated when VDD is powered up.

• Hardware Reset - activated when the LRESET input is asserted (low).

• Host Software Reset - triggered by the HSWRST bit of the SIOCF1 register (see Section 3.7.2 on page 49); the

HSWRST bit is set by the host through the LPC Interface.

• Controller Software Reset (PC87413 and PC87417) - triggered by the CSWRST bit of the ACBCFG register (see Sec-

tion 6.3.3 on page 128); the CSWRST bit is set by the system controller through the ACCESS.bus Interface.

Unless otherwise noted, reset references throughout the modules of the PC8741x devices default to the following resets:

For VPP-retained functions (RTC, part of SWC and some other functions): VPP Power-Up reset.

For VSB-powered functions (ACCESS.bus, X-Bus, GPIO ports, Clock Generator, part of SWC and part of Conﬁgura-

tion Control): VSB Power-Up reset or Controller Software Reset (within the limitations described in Section 2.2.3).

For VDD-powered functions (Legacy modules, LPC and part of Conﬁguration Control): VDD Power-Up reset,

Hardware Reset or Host Software Reset (within the limitations described in Section 2.2.6).

The following sections detail the sources and effects of the various resets on the PC8741x devices per reset source.

2.2.1

VPP Power-Up Reset

VPP is an internal power signal derived from VSB and VBAT.VPP Power-Up reset is generated by an internal circuit that de-

tects the status of the VPP power. An active VPP Power-Up reset signal is generated following a rise in the VPP until the VPP

power within the accepted range is detected (see Section 11.1.5 on page 232). When VPP Power-Up reset is active, it resets

the modules and registers whose values are retained by VPP (RTC, part of SWC and some other functions). The VPP Power-

Up reset also activates the 32 KHz internal crystal oscillator.

2.2.2

VSB Power-Up Reset

VSB Power-Up reset is generated by an internal circuit when VSB power is applied. This reset is completed after 8,192 cycles

of the 32 KHz clock (t32KOSC). However, if the 32 KHz on-chip crystal oscillator was disabled before VSB power-up, a delay

of t32KW (see Low Frequency Clock Timing on page 242) is added to tIRST (see VSB Power-Up Reset on page 239) to ac-

count for the time required by the 32 KHz oscillator to stabilize. In addition, if the Hardware reset (LRESET) is de-asserted

in an early stage, only 1,280 clock cycles are required to complete the VSB Power-Up reset.

External devices should wait at least tIRST before accessing the PC8741x device. However, if the system controller accesses

the PC8741x device (through the ACCESS.bus) before tIRST ends, both the ACBDAT and the ACBCLK signals will float until

the end of VSB Power-Up reset, which is when the ACCESS.bus Interface becomes operational. Since these signals are

pulled-up by external resistors, this situation is equivalent to generating a NACK condition in response to the system con-

troller access (see Section 6.2.4 on page 118).

VSB Power-Up reset performs the following actions and all the actions performed by VDD Power-Up reset (if the VDD power

is already active):

• Activates the Clock Generator and sets its output to the default frequency.

• Puts pins with V

SB strap options into TRI-STATE and enables their internal pull-down resistors.

• Samples the logic levels of the V

SB strap pins.

• Sets up the PC8741x device slave address on the ACCESS.bus (PC87413 and PC87417).

• Resets the V

SB-powered lock bits in the Configuration Control and X-Bus (PC87416 and PC87417).

• Loads default values to the GPIO Configuration bits: VDDLOAD and BUSCTL.

• Loads default values to the V

SB-powered bits in SWC.

• Loads default values to the bits in ACCESS.bus Interface (PC87413 and PC87417).

• Sets up the pull-up option and the default source for the V

SB-powered multiplexed output pins.

• Executes all the actions performed by the Controller Software reset (see Section 2.2.3 on page 35) in all PC8741x devices.

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