AD6676EBZ datasheet(80/90 Pages) AD

80 / 90 page

AD6676

Data Sheet

Rev. A | Page 80 of 90

JESD204 DID Register

Address: 0x1C0, Reset: 0x00, Name: DID

Table 91. Bit Descriptions for DID

Bits

Bit Name

Description

Reset

Access

[7:0]

DID

Device ID

0x00

JESD204 BID Register

Address: 0x1C1, Reset: 0x00, Name: BID

Table 92. Bit Descriptions for BID

Bits

Bit Name

Description

Reset

Access

[7:4]

RESERVED

0x0

[3:0]

BID

Bank ID

0x0

JESD204 L/SCR Register

Address: 0x1C3, Reset: 0x00, Name: L

Table 93. Bit Descriptions for L

Bits

Bit Name

Settings

Description

Reset

Access

SCR

SCR Parameter.

0x0

Scrambling disabled.

Scrambling enabled.

[6:5]

RESERVED

0x0

[4:0]

L Parameter.

0x00

00000

One lane.

00001

Two lanes.

JESD204 F Register

Address: 0x1C4, Reset: 0x03, Name: F

Table 94. Bit Descriptions for F

Bits

Bit Name

Settings

Description

Reset

Access

[7:0]

Octest per Frame per Lane.

0x03

00000001

F = 2

00000011

F = 4

JESD204 K Register

Address: 0x1C5, Reset: 0x1F, Name: K

Table 95. Bit Descriptions for K

Bits

Bit Name

Settings

Description

Reset

Access

[7:5]

RESERVED

0x0

[4:0]

Frames per multiframe. Number of frames per multiframe is the register

value plus one.

0x1F

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