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AD6676EBZ Fiches technique(PDF) 56 Page - Analog Devices |
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AD6676EBZ Fiches technique(HTML) 56 Page - Analog Devices |
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56 / 90 page ![]() AD6676 Data Sheet Rev. A | Page 56 of 90 IF FREQUENCY PLANNING The Σ-Δ ADC can achieve exceptional SFDR performance over a wide IF frequency range because its high oversampling ratio prevents low order harmonics from aliasing into the IF pass band. Higher order harmonics that do alias back are typically of much lower magnitude, with the shuffling option further reducing their levels. However, finite isolation between the Σ-Δ ADC and the digital block causes additional spurious signals that are a function of the output data rate, fDATA_IQ, and input frequency, fIN. Specifically, the feedback DACs in the Σ-Δ ADC suffer from digital contamination of its clock signal. Therefore, the same equation used to predict spurious locations on high speed DACs with digital interpolation filters applies. Equation 15 defines this relationship with the spur location falling at fMN. fMN = ±(M × fDATA_IQ) ± (N × fIN) (15) where: M is the digital induced harmonic content from internal clocks. N is the harmonics from the Σ-Δ ADC. When N = 0, signal independent spurs fall at integer multiples of fDATA_IQ. Table 23 shows the measured M × fDATA_IQ spurious levels (dBFS) for different IF frequencies and decimation factors with fDATA_IQ equal to 100 MSPS and 200 MSPS. All of the M × fDATA_IQ regions display low spurious with the exception of 200 MHz. This is because a large portion of digital circuitry is clocked at FADC/16 for DEC_MODES of 1 and 3 or FADC/12 for DEC_MODES of 2 and 4. As a result, the M = 2 spur is dominant when operating at the higher decimation factors of 32 and 24 whereas the M = 1 spur is dominant when operating at the lower decimation factors of 16 and 12. When N = 1, signal dependent spurs falls at integer multiples of fDATA_IQ. These M × N spurs are called images because they have a 1:1 relationship in amplitude and frequency with the input signal, fIN. Note that the magnitude of some images can also vary slightly between power cycles, due to different phase relationships among internal clock dividers upon device initialization. Figure 136 shows a normalized image graph (relative to fDATA_IQ) showing the image location relative for a given input frequency. When N > 1, spurious content is often at lower magnitude than other spurious thus often can be ignored. The exception is when fIN falls below the IF pass band such that its lower order harmonics may fall within the pass band (that is, IF/2 and IF/3). 4.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 NORMALIZED INPUT FREQUENCY M = 6 M = 7 M = 8 M = 5 M = 3 M = 4 M = 2 M = 2 M = 3 M = 1 Figure 136. Image Location for Different M Factors Normalized to fDATA_IQ Table 23. Measured Spurious Levels at Different IFs Where M × fDATA_IQ Falls On for fDATA_IQ of 100 MSPS and 200 MSPS f DATA_IQ Spurious Levels (dBFS) IF = 100 MHz IF = 200 MHz IF = 300 MHz IF = 400 MHz 100 MSPS DEC_MODE = 1 <−100 −81 <−110 −97 DEC_MODE = 2 −100 −79 <−110 N/A1 200 MSPS DEC_MODE = 3 <−110 −81 <−110 −90 DEC_MODE = 4 <−110 −77 <−110 N/A1 1 N/A means not applicable. Because the image spurs are also at low levels, the AD6676 offers a wide range of suitable IFs for a given output data rate, fDATA_IQ. Even IFs that are situated in a region where the worst M × fDATA_IQ spurious condition described in Table 23 can be used because they remain at a fixed location and remain signal independent. Similar to the LO feedthrough issue in a direct conversion IQ receiver, a slow digital tracking loop in the host processor can be used to nullify it. Figure 137 and Figure 138 show a case where the IF of 200 MHz was selected for an fDATA_IQ of 200 MSPS and 100 MSPS such that dominant spur falls exactly at the IF center. As shown in Figure 136, the IF is positioned at a normalized fDATA_IQ of 1 or 2 for 200 MSPS and 100 MSPS operation, thus explaining why the image term is M = 2 or 4. Note that the image spur is quite low for M = 2 and can be further improved by selecting a higher decimation factor (DEC_MODE of 3 vs. 1) that results in the M = 4 image. |
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