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AD6676EBZ Fiches technique(PDF) 48 Page - Analog Devices |
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AD6676EBZ Fiches technique(HTML) 48 Page - Analog Devices |
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48 / 90 page ![]() AD6676 Data Sheet Rev. A | Page 48 of 90 For scrambled data, any 0xFC character at the end of a frame is replaced by an /F/ and any 0x7C character at the end of a multiframe is replaced with an /A/. The JESD204B receiver checks for /F/ and /A/ characters in the received data stream and verifies that they only occur in the expected locations. If an unexpected /F/ or /A/ character is found, the receiver uses dynamic realignment or asserts the SYNCINB± signal for more than four frames to initiate a resynchronization. For unscrambled data, if the final character of two subsequent frames is equal, the second character is replaced with an /F/ if it is at the end of a frame, and an /A/ if it is at the end of a multiframe. Insertion of alignment characters may be modified using SPI. The frame alignment character insertion is enabled by default. More information on the link controls is available in the SPI register descriptions for Register 0x1E0 to Register 0x1E6. 8-Bit/10-Bit Encoder The 8-bit/10-bit encoder converts 8-bit octets into 10-bit symbols and inserts control characters into the stream when needed. The control characters used in JESD204B are shown in Table 18. The 8-bit/10-bit encoding ensures that the signal is dc balanced by using the same number of ones and zeroes across multiple symbols. Note that the 8-bit/10-bit interface has an invert option available in Register 0x1E4 that has the same effect of swapping the differential output data pins. K K R D D A R Q C C D D A R D D A R D D A D START OF ILAS START OF LINK CONFIGURATION DATA END OF MULTIFRAME START OF USER DATA Figure 121. Initial Lane Alignment Sequence Table 18. Control Characters used in JESD204B Including Running Disparity Values Abbreviation Control Symbol 8-Bit Value 10-Bit Value (RD = −1) 10-Bit Value (RD = +1) Description /R/ K28.0 000 11100 001111 0100 110000 1011 Start of multiframe /A/ K28.3 011 11100 001111 0011 110000 1100 Lane alignment /Q/ K28.4 100 11100 001111 0010 110000 1101 Start of link configuration data /K/ K28.5 101 11100 001111 1010 110000 0101 Group synchronization /F/ K28.7 111 11100 001111 1000 110000 0111 Frame alignment |
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