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SPEAR300 Fiches technique(PDF) 8 Page - STMicroelectronics

No de pièce SPEAR300
Description  Embedded MPU with ARM926 core, flexible memory support, powerful connectivity features and human machine interface
PDF  83 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR300 Fiches technique(HTML) 8 Page - STMicroelectronics

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Description
SPEAr300
8/83
Doc ID 16324 Rev 2
1
Description
The SPEAr300 is a member of the SPEAr family of embedded MPUs for networked devices.
It is based on the powerful ARM926EJ-S processor (up to 333 MHz), widely used in
applications where high computation performance is required.
In addition, SPEAr300 has an MMU that allows virtual memory management -- making the
system compliant with advanced operating systems like Linux. It also offers 16 KB of data
cache, 16 KB of instruction cache, JTAG and ETM (embedded trace macro-cell) for debug
operations.
A full set of peripherals allows the system to be used in many applications, some typical
applications being HMI, Security and VoIP phones.
Figure 1.
Functional block diagram
9*9 keyboard
controller
Camera Interface
LCD Controller
1024*768
Up to 62 GPIOs
Ethernet 10/100
(MII interface)
SSP
UART and IrDA
I2C master/slave
1-bit DAC
JTAG/Trace
ARM926EJ-S
@ 333 MHz
System
Controller
Interrupt
Controller
Timers
Watchdog
RTC
PLLs
ICache
DCache
MMU
Mobile DDR/DDR2
memory controller
32 KBytes BootRom
57 KBytes SRAM
NAND/NOR
Flash controller
ADC 10-bit 8 ch
JPEG Codec
accelerator
C3 Crypto
accelerator
USB Device 2.0 +Phy
SDIO/MMC
TDM master/slave
USB Host 2.0 +Phy
USB Host 2.0 +Phy
Serial Flash Interface
I2S full duplex
= Functions with shared I/Os depending on the device configuration. Refer to
the pin description
Multichannel DMA
controller



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