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SPEAR600 Fiches technique(PDF) 28 Page - STMicroelectronics |
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SPEAR600 Fiches technique(HTML) 28 Page - STMicroelectronics |
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28 / 97 page ![]() Pin description SPEAr600 28/97 Doc ID 16259 Rev 3 SSP SSP_1_MOSI AA21 I/O Master out slave in TTL bidir buffer, 3.3 V capable, 8 mA, 3.3 V tolerant, PU(1) SSP_1_MISO AB21 Master in slave out SSP_1_SCLK AB22 Serial clock SSP_1_SS AA22 Slave select SSP_2_MOSI K20 Master out slave in SSP_2_MISO K21 Master in slave out SSP_2_SCLK K22 Serial clock SSP_2_SS_0 K19 Slave select SSP_3_MOSI J20 Master out slave in SSP_3_MISO J21 Master in slave out SSP_3_SCLK J22 Serial clock SSP_3_SS J19 Slave select UART UART1_TXD AA19 Output Serial data out TTL output buffer, 3.3 V capable, 4 mA UART2_TXD AA20 UART1_RXD AB19 Input Serial data in TTL input buffer, 3.3 V tolerant, PD UART2_RXD AB20 FIRDA FIRDA_TXD AA18 Output Serial data out TTL output buffer, 3.3 V capable, 4mA FIRDA_RXD AB18 Input Serial data in TTL input buffer, 3.3 V tolerant, PU I2C SDA Y18 I/O Serial data in/out TTL bidir buffer, 3.3V capable, 4 mA, 3.3 V tolerant, PU SCL Y19 I/O Serial clock 1. When the pin is not driven, the output voltage is 2.5 V, On the core side, logic ‘1’ state is guaranteed. Table 5. SMI, SSP, UART, FIRDA and I2C pins (continued) Group Signal name Ball Direction Function Pin type |
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