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SPEAR600 Fiches technique(PDF) 71 Page - STMicroelectronics

No de pièce SPEAR600
Description  Embedded MPU with dual ARM926 core, flexible memory support, powerful connectivity features and programmable LCD interface
PDF  97 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR600 Fiches technique(HTML) 71 Page - STMicroelectronics

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SPEAr600
Timing characteristics
Doc ID 16259 Rev 3
71/97
6.3
CLCD timing characteristics
The characterization timing is done considering an output load of 10 pF on all the
outputs.The operating conditions are in worst case V=0.90 V T=125 °C and in best case
V=1.10 V T= 40 °C.
The CLCD has a wide variety of configurations and setting and the parameters change
accordingly. Two main scenarios will be considered, one with direct clock to output (166
MHz), setting BCD bit to '1', and the second one with the clock passing through a clock
divider (83 MHz), setting BCD bit to '0'. Please refer to the Table 477 for more information on
the significance of bit BCD).
6.3.1
CLCD timing characteristics direct clock
Figure 15.
CLCD waveform with CLCP direct
Figure 16.
CLCD block diagram with CLCP direct
Table 43.
CLCD timings with CLCP direct
Parameter
Value
Frequency
Tclock direct max (Tclock)
6 ns
166 MHz
Tclock direct max rise (Tr)
0.81 ns
Tclock direct max (Tf)
0.87 ns
Tmin
-0.04 ns
Tmax
3.62 ns
Tstable
2.34 ns
Tmin
Tmax
CLCP
CLD[23:0], CLAC, CLLE,
CLLP, CLFP, CLPOWER
Tclock
Tr
Tf
Tstable
Q
Q
SET
CLR
D
t2
t3
CLCP
CLD[23:0], CLAC, CLLE,
CLLP, CLFP, CLPOWER
CLCDCLK
t1



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