AS7038RB datasheet(107/127 Pages) AMSOSRAM

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AS7038RB

Functional Description

Datasheet

• PUBLIC

DS000726

• v2-00 • 2021-Jun-02

126

│ 106

channel is transmitted. Then toggling can be stopped for up to 5 FIFO entries and the very first

stopping indicates the first ADC channel. To allow encoding of any number of ADC channels, the first

ADC channel encoding is dropped from time to time.

FIFOH (Address 0xff)

Figure 144:

FIFOH Register

Addr: 0xff

FIFOH

Bit

Bit Name

Default

Access

Bit Description

7:0

fifoh

PUSHPOP

High byte of FIFO

See Interrupts for the actual FIFO interrupt.

7.1.22

Digital Interface

After setting the pin ENABLE=1 the AS7038RB registers can be accessed by the I²C interface. Before

enabling any additional function (current source, TIA, ADC…) set the bit ldo_en=1 to set the internal

LDO to normal mode.

For operating the ADC or the sequencer enable the oscillator by setting osc_en=1

GPIO Pins

Figure 145:

GPIO Pin Diagram

VDD

GND

GPIO0...3

to analog

pullup/pulldown controlled

by gpio_p

enabled if gpio_a=0

gpio_i

enabled if gpio_e=1

gpio_o

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