AS7038RB datasheet(76/127 Pages) AMSOSRAM

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AS7038RB

Functional Description

Datasheet

• PUBLIC

DS000726

• v2-00 • 2021-Jun-02

126

│ 75

Addr: 0x25

LTF_CONFIG

Bit

Bit Name

Default

Access

Bit Description

ltf_fifo_mode

Run LTF integrations back to back, the LTF

modulator is running continuously (the

modulators are not reset between integrations

cycles).

After each integration, the result gets written to

the FIFO. The FIFO is being filled

automatically, FIFO threshold interrupt is

flagged as configured.

The first item read from the FIFO is from

channel 0, the next one from channel 1, etc.

Note that there is no ltf_done interrupt

triggered after each integration. A FIFO

threshold of 1 can be used to generate an

interrupt for each result. irq_ltf_enab should be

kept asserted to avoid missing an ltf_sat

interrupt.

Do not enable ADC/sequencer FIFO mode

and ltf_fifo_mode at the same time, corrupted

data would be the result.

Make sure to empty the FIFO in time, if the

FIFO is full, new data is not being stored in the

FIFO. Source of data read from the FIFO after

an overflow condition is undefined (can be

from channel 0 or channel 1)

Stop the procedure by clearing this bit.

ltf_enable

This bit must be asserted for any LTF function

(powers up the LTF clock tree)

LTF_SEL (Address 0x26)

Figure 93:

LTF_SEL Register

Addr: 0x26

LTF_SEL

Bit

Bit Name

Default

Access

Bit Description

Do not use

6:4

ltf1_sel

Select the sensor diode for LTF1

Setting

Source

Clear

Not used

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