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ST10F269Z1Q6 Fiches technique(PDF) 60 Page - STMicroelectronics

No de pièce ST10F269Z1Q6
Description  16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM
PDF  184 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10F269Z1Q6 Fiches technique(HTML) 60 Page - STMicroelectronics

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12 - PARALLEL PORTS
ST10F269
60/184
12.2.3 - Output Driver Control
The port output control registers POCONx allow
to select the port output driver characteristics of a
port. The aim of these selections is to adapt the
output drivers to the application’s requirements,
and to improve the EMI behaviour of the device.
Two characteristics may be selected:
Edge characteristic defines the rise/fall time for
the respective output. Slow edges reduce the
peak currents that are sinked/sourced when
changing
the
voltage
level
of
an
external
capacitive load. For a bus interface or pins that are
changing
at
frequency
higher
than
1MHz,
however, fast edges may still be required.
Driver characteristic defines either the general
driving capability of the respective driver, or if the
driver strength is reduced after the target output
level has been reached or not. Reducing the
driver strength increases the output’s internal
resistance,
which
attenuates
noise
that
is
imported via the output line. For driving LEDs or
power transistors, however, a stable high output
current may still be required as described below.
This rise / fall time of 4 I/O pads (a nibble) is
selected using 2-bit named PNxEC. That means
Port Nibble (x = nibble number, it could be 3 as for
Port 2.15 to 2.12) Edge Characteristic.
The sink / source capability of the same 4 I/O
pads is selected using 2-bit named PNxDC. That
means Port Nibble (x = nibble number) Drive
Characteristic (See Table 18).
POCONx (F0yyh / zzh) for 8-bit Ports
ESFR
Reset Value: --00h
POCONx (F0yyh / zzh) for 16-bit Ports
ESFR
ResetValue:0000h
Note: In case of reading an 8 bit P0CONX register, high Byte (bit 15..8) is read as 00h
Figure 20 : Hysteresis for Special Input Thresholds
Input level
Bit state
Hysteresis
15
14
13
12
11
10
9876543210
--------
PN1DC
PN1EC
PN0DC
PN0EC
RW
RW
RW
RW
15
14
13
12
11
10
9876543210
PN3DC
PN3EC
PN2DC
PN2EC
PN1DC
PN1EC
PN0DC
PN0EC
RW
RW
RW
RW
RW
RW
RW
RW
Bit
Function
PNxEC
Port Nibble x Edge Characteristic (rise/fall time)
00:
Fast edge mode, rise/fall times depend on the size of the driver.
01:
Slow edge mode, rise/fall times ~60 ns
10:
Reserved
11:
Reserved
PNxDC
Port Nibble x Driver Characteristic (output current)
00:
High Current mode:
Driver always operates with maximum strength.
01:
Dynamic Current mode:
Driver strength is reduced after the target level has been reached.
10:
Low Current mode:
Driver always operates with reduced strength.
11:
Reserved



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