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PCF8811U/2DA/1 Fiches technique(PDF) 34 Page - NXP Semiconductors

No de pièce PCF8811U/2DA/1
Description  80 x 128 pixels matrix LCD driver
PDF  73 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PCF8811U/2DA/1 Fiches technique(HTML) 34 Page - NXP Semiconductors

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2004 May 17
34
Philips Semiconductors
Product specification
80
× 128 pixels matrix LCD driver
PCF8811
13.6
Set Y address of RAM
Y[3:0] defines the Y address of the display RAM.
Table 18 X/Y address range
When the icon row is enabled this icon row (ROW 79) will
always be in bank 9 independent of the mux rate which is
programmed.
13.7
Set X address of RAM
The X address points to the columns. The range of X is
0 to 127 (7FH).
13.8
Set display start line
L[6:0] is used to select the display line address of the
display RAM to be displayed on the initial row, ROW 0.
The selection of L is limited to steps of 8. When the icon
row is selected, the selection of L is limited to steps of 16.
When a partial mode is selected, the selection of L is also
limited in steps. In addition, the selection of L = 72 is not
allowed when the icon row is enabled or disabled.
The initial row can, in turn, be set by C[6:0]. ROW 0 cannot
be set to the icon row ROW 79 when enabled.
An example of the mapping from the RAM content to the
display is illustrated in Fig.30. The content of the RAM is
not modified. This feature allows, for instance, screen
scrolling without rewriting the RAM.
Y3
Y2
Y1
Y0
CONTENT
ALLOWED
X RANGE
0000
bank 0 (display RAM)
0 to 127
0001
bank 1 (display RAM)
0 to 127
0010
bank 2 (display RAM)
0 to 127
0011
bank 3 (display RAM)
0 to 127
0100
bank 4 (display RAM)
0 to 127
0101
bank 5 (display RAM)
0 to 127
0110
bank 6 (display RAM)
0 to 127
0111
bank 7 (display RAM)
0 to 127
1000
bank 8 (display RAM)
0 to 127
1001
bank 9 (display RAM)
0 to 127



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