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C161PI Fiches technique(PDF) 24 Page - Infineon Technologies AG |
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C161PI Fiches technique(HTML) 24 Page - Infineon Technologies AG |
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24 / 82 page ![]() &3, Data Sheet 22 1999-07 Figure 6 Block Diagram of GPT1 With its maximum resolution of 8 TCL, the GPT2 module provides precise event control and time measurement. It includes two timers (T5, T6) and a capture/reload register (CAPREL). Both timers can be clocked with an input clock which is derived from the CPU clock via a programmable prescaler. The count direction (up/down) for each timer is programmable by software. Concatenation of the timers is supported via the output toggle latch (T6OTL) of timer T6, which changes its state on each timer overflow/ underflow. T3 Mode Control 2n : 1 f CPU 2n : 1 f CPU T2 Mode Control GPT1 Timer T2 Reload Capture 2n : 1 f CPU T4 Mode Control GPT1 Timer T4 Reload Capture GPT1 Timer T3 T3OTL U/D T2EUD T2IN T3IN T3EUD T4IN T4EUD T3OUT Toggle FF U/D U/D Interrupt Request Interrupt Request Interrupt Request Other Timers MCT02141 |
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