 |
Moteur de recherche de fiches techniques de composants électroniques |
|
|
Moteur de recherche de fiches techniques de composants électroniques |
|
5M40ZE64C5N Fiches technique(PDF) 22 Page - Altera Corporation |
|
|
|||||||||||||||||||||||||||||
5M40ZE64C5N Fiches technique(HTML) 22 Page - Altera Corporation |
|
|
22 / 30 page  3–22 Chapter 3: DC and Switching Characteristics for MAX V Devices Timing Model and Specifications MAX V Device Handbook May 2011 Altera Corporation Table 3–30 lists the external I/O timing parameters for the F324 package of the 5M1270Z device. Table 3–31 lists the external I/O timing parameters for the 5M2210Z device. Table 3–30. Global Clock External I/O Timing Parameters for the 5M1270Z Device (Note 1), (2) Symbol Parameter Condition C4 C5, I5 Unit Min Max Min Max tPD1 Worst case pin-to-pin delay through one LUT 10 pF — 9.1 — 11.2 ns tPD2 Best case pin-to-pin delay through one LUT 10 pF — 4.8 — 5.9 ns tSU Global clock setup time — 1.5 — 1.9 — ns tH Global clock hold time — 0 — 0 — ns tCO Global clock to output delay 10 pF 2.0 6.0 2.0 7.4 ns tCH Global clock high time — 216 — 266 — ps tCL Global clock low time — 216 — 266 — ps tCNT Minimum global clock period for 16-bit counter — 4.0 — 5.0 — ns fCNT Maximum global clock frequency for 16-bit counter — — 247.5 — 201.1 MHz Notes to Table 3–30: (1) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay performs faster than this global clock input pin maximum frequency. (2) Only applicable to the F324 package of the 5M1270Z device. Table 3–31. Global Clock External I/O Timing Parameters for the 5M2210Z Device (Note 1) Symbol Parameter Condition C4 C5, I5 Unit Min Max Min Max tPD1 Worst case pin-to-pin delay through one LUT 10 pF — 9.1 — 11.2 ns tPD2 Best case pin-to-pin delay through one LUT 10 pF — 4.8 — 5.9 ns tSU Global clock setup time — 1.5 — 1.9 — ns tH Global clock hold time — 0 — 0 — ns tCO Global clock to output delay 10 pF 2.0 6.0 2.0 7.4 ns tCH Global clock high time — 216 — 266 — ps tCL Global clock low time — 216 — 266 — ps tCNT Minimum global clock period for 16-bit counter — 4.0 — 5.0 — ns fCNT Maximum global clock frequency for 16-bit counter — — 247.5 — 201.1 MHz Note to Table 3–31: (1) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay performs faster than this global clock input pin maximum frequency. |
|
Lien URL |
| ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Lien vers la fiche technique | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
French ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
