5M40ZE64C5N datasheet(19/30 Pages) ALTERA

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Chapter 3: DC and Switching Characteristics for MAX V Devices

3–19

Timing Model and Specifications

May 2011

Altera Corporation

MAX V Device Handbook

External Timing Parameters

External timing parameters are specified by device density and speed grade. All

external I/O timing parameters shown are for the 3.3-V LVTTL I/O standard with the

maximum drive strength and fast slew rate. For external I/O timing using standards

other than LVTTL or for different drive strengths, use the I/O standard input and

output delay adders in Table 3–32 on page 3–23 through Table 3–36 on page 3–25.

f For more information about each external timing parameters symbol, refer to

AN629: Understanding Timing in Altera CPLDs.

Figure 3–5. UFM Erase Waveform

ARShft

ARClk

ARDin

DRShft

DRClk

DRDin

DRDout

Program

Erase

Busy

9 Address Bits

ASU

ACLK

ADH

ADS

EPMX

OSCS

OSCH

OSC_ENA

Table 3–25. Routing Delay Internal Timing Microparameters for MAX V Devices

Routing

5M40Z/ 5M80Z/ 5M160Z/

5M240Z/ 5M570Z

5M1270Z/ 5M2210Z

Unit

C5, I5

Min

Max

Min

Max

Min

Max

Min

Max

tC4

—

860

—

1,973

—

561

—

690

tR4

—

655

—

1,479

—

445

—

548

tLOCAL

—

1,143

—

2,947

—

731

—

899

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