October 1994

7

Philips Semiconductors

Preliminary specification

YUV picture improvement processor based

on histogram modification

TDA9170

Table 1

Slave address.

Table 2

Control function.

Note

1. Valid sub-addresses: 00 to 05 (HEX); auto-increment mode available for sub-addresses.

A6

A5

A4

A3

A2

A1

A0

R/W

1

1

0

1

0

0

ADR

X

CONTROL

FUNCTION

TYPE

DATA BYTE

D7

D6

D5

D4

D3

D2

D1

D0

Control

REG

00

X

X

X

BON

WD2

WD1

AMS

SLP

User variable

gamma

DAC

01

X

X

D5

D4

D3

D2

D1

D0

Adaptive gamma

DAC

02

X

X

D5

D4

D3

D2

D1

D0

Non-linear

amplifier

DAC

03

X

X

D5

D4

D3

D2

D1

D0

Line start stop

REG

04

ST3

ST2

ST1

ST0

SP3

SP2

SP1

SP0

Field start stop

REG

05

ST3

ST2

ST1

ST0

SP3

SP2

SP1

SP0

Status

REG

−

X

X

X

X

X

X

X

POR

Table 3

Window select bits (WD1 and WD2).

Table 4

Amplitude select bit (AMS).

WD1

WD2

FUNCTION

0

0

default window

0

1

window by sandcastle blanking

1

X

user window

LOGIC LEVEL

FUNCTION

0

0.3 V luminance

1

1 V luminance

Table 5

Sleep mode bit (SLP).

Table 6

Black offset compensation enable bit (BON).

LOGIC LEVEL

FUNCTION

0

sleep

1

LOGIC LEVEL

FUNCTION

0

disabled

1

enabled