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ACE9030M/IW/FP2Q Fiches technique(PDF) 32 Page - Mitel Networks Corporation |
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ACE9030M/IW/FP2Q Fiches technique(HTML) 32 Page - Mitel Networks Corporation |
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32 / 39 page ![]() 32 ACE9030 The value of SF can be found from any channel but to get a quick estimate the highest frequency can be considered as there is a fixed upper limit on CN of 256 so: Putting suggested typical values into equation (7); N TOT(max) = 10000, CN(max) = 250, and MOD = 8, and then assuming the current flows for the whole comparison period the current to be multiplied by ACC is Ibo / 320. The typical Ibo is only 1 µA so this is a very small current of around 3 nA and would be too small to control accurately and certainly too small for production testing. The error signal to be cancelled is a narrow pulse at the comparison frequency so the best cancellation of the whole spectrum of the error is also a narrow pulse. It is not practical to generate a variable width pulse to match the error pulse but a fixed width variable amplitude pulse is possible and it can be timed to approximately coincide with the error pulse to give good cancellation. The compensation current amplitude is also increased by gating it with a small time window and in ACE9030 the gate is set to two cycles of the reference clock which straddle the active edge of the comparison frequency signal to the phase comparator. The total reference division from reference clock to comparison frequency is the programmable divider set by NR in Word D multiplied by 1, 2, 4, or 8 as selected by the SM bits also in Word D and this total may be called R MAIN, so for the compensation current the scaling is R MAIN / 2. The charge needed is still as in equation (7) but the current can be defined as: where, in ACE9030, the compensation reference current Ico is set by an external resistor RSC such that: but this Ico must be chosen to cancel the error charge in equation (7), and the scaling effect of 2 reference cycles in R MAIN has been derived above, giving: then removing SF to help evaluate the values needed: this can then be further processed by replacing R MAIN and N TOT(max) by the frequency ratios: then when substituting these into equation (9) the f COMP terms cancel leaving: RMAIN = and NTOT (max) = RMAIN For a typical AMPS cellphone the f VCO(max) for 45 MHz I.F. is 938·97 MHz, f CRYSTAL is 14·85 MHz, MOD is 8 and CN(max) can be assumed to be chosen around 200, giving Ico = 0·198 x Ibo. Fractional-N Mode with Speed-Up When Speed-up is active the main proportional charge pumps are run at an increased current and the integral charge pumps are switched on to move the loop filter voltage faster. The phase errors due to Fractional-N mode will be the same as normal once the loop is locked so the compensation pulses must be increased to match the proportional and integral charge pump currents in order to allow a smooth change over to normal mode at the end of Speed-up time. The same 2L + 1 and K coefficients as used for the proportional and integral charge pump currents are used on the compensation currents so from equation (8): Normal Mode: Proportional Compensation Current: Icomp(0) = ACC x Ico Integral Compensation Current: none = off Speed-up Mode: Proportional Compensation Current: Icomp(1) = 2L + 1 x ACC x Ico Integral Compensation Current: Icomp(2) = K x 2L + 1 x ACC x Ico Required Accuracy of Compensation With the compensation scheme used in ACE9030 it is not possible to get perfect cancellation of the loop disturbance by the Fractional-N system due to the mis-match of the pulse shapes leaving some high frequency terms, but if the areas are matched there will be complete removal of the low fre- quency components and the loop filter can be assumed able to remove higher frequencies. Typical timing waveforms for the phase error and its compensation are shown in figure 28 for a loop operating in 1/ 8’s mode (hence MOD = 8), with a VCO at 1 GHz, and a comparison frequency of 100 kHz (hence N TOT = 10,000 and f COMP period = 10 µs) so that each phase error can be found from equation (4) as: (ACC x 10 µs) / (10,000 x 8) = ACC x 0·125 ns. If the reference is a 12·8 MHz crystal, it gives a correction pulse duration, two reference cycles, of 2/(12·8 MHz) = 156 ns. If the charge pump current of 250 µA is set by a CN value of 250 the reference current Ibo from equation (6) is 1 µA and the compensation step current Ico can be found from equation (10) as 0·2 x Ibo = 0·2 µA. Areas of the error and the compensation pulses, equa- tions (4) and (8) must match to get good low frequency cancellation. Although shown as a very narrow pulse on Ø DOWN the phase error will often appear as a change in size of the pulses on either Ø DOWN or ØUP which occur to maintain lock. The following calculations would then apply to the changes and give the same final result. If there was no compensation the Ø DOWN pulses would give sidebands at a level set by the loop filter capacitor values and the VCO gain. In a typical system the filter proportional capacitor can be 6·8 nF and the VCO could cover 30 MHz in 3 V, giving 10 MHz/V. Assuming for the moment that all error pulses are the same at the level of a mid-range ACC value, say 4, and do SF = CN(max) NTOT(max) Icomp (0) = ACC x Ico .....(8) Ico = IRSC 320 Ico = x x Ibo SF 2 MOD x NTOT(max) Ico = x x Ibo ....(9) CN (max) RMAIN 2 fCRYSTAL fCOMP fvco (max) fCOMP MOD x fVOC (max) Ico = x x Ibo ....(10) CN (max) fCRYSTAL 2 MOD |
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