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AN3392 Fiches technique(PDF) 14 Page - STMicroelectronics |
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AN3392 Fiches technique(HTML) 14 Page - STMicroelectronics |
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14 / 57 page ![]() Application efficiency AN3392 14/57 Doc ID 018749 Rev 1 5 Application efficiency In designing a boost application, a typical constraint is the maximum output current ripple. Once frequency, input, and output voltage are defined, this ripple is directly related to the inductance value in the application: Equation 3 The inductance value can be designed for a single-ended architecture and then divided by 4 in the case of IL-4 architecture. Each inductor, due to its internal resistance (RL), can affect system efficiency. For high current applications, an inductor with a compact geometry may compromise the efficiency requirements. Using the same ferromagnetic material, higher inductance can be achieved by increasing the inductor geometry, or by increasing the number of turns but using a thinner wire. In order to save space and cost, the latter solution is preferred but this increases the internal resistance and the saturation current of the inductor. I ripple I Lmax I Lmin V in L -------- D F sw --------- ⋅ = – = |
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