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SH7708 Fiches technique(PDF) 460 Page - Renesas Technology Corp |
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SH7708 Fiches technique(HTML) 460 Page - Renesas Technology Corp |
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460 / 633 page ![]() 442 CKIO, internal clock Stable oscillation Standby tOSC4 IRL3–IRL0 Note: Oscillation settling time when built-in oscillator is used Figure 16.7 Standby Return Oscillation Settling Time (Return by IRL3–IRL0) EXTAL input or CKIO input Stable input clock Reset or NMI interrupt request Stable input clock Normal Normal Standby PLL output, CKIO output Internal clock STATUS 0 STATUS 1 PLL synchronization Note: PLL oscillation settling time when clock is input from EXTAL pin or CKIO pin tPLL PLL synchronization Figure 16.8 PLL Synchronization Settling Time in Case of Reset or NMI Interrupt |
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