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SH7708 Fiches technique(PDF) 24 Page - Renesas Technology Corp |
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SH7708 Fiches technique(HTML) 24 Page - Renesas Technology Corp |
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24 / 633 page ![]() 6 1.2 Block Diagram Figure 1.1 shows a block diagram of the SH7708 Series. Multiplier MMU (memory management unit) Mixed instruction/ data TLB Cache controller Mixed instruction/ data cache memory CPU Interrupt controller User break controller (2 channels) Bus state controller PLL built-in clock oscillator WDT (watchdog timer) External bus interface I/O ports SCI (serial communication interface) Timer (3 channels) Realtime clock Figure 1.1 SH7708 Series Block Diagram |
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