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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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NM1282KSLAXAL Fiches technique(PDF) 19 Page - Nanya Technology Corporation. |
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NM1282KSLAXAL Fiches technique(HTML) 19 Page - Nanya Technology Corporation. |
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19 / 120 page  Version 1.3 19 Nanya Technology Corp. 06/2018 All Rights Reserved. © 2Gb SLC NAND + 2Gb LPDDR2 NM1282KSLAXAL NTC Proprietary Level: Property DEVICE OPERATION Read Mode Read mode is set when the "00h" and “30h” commands are issued to the Command register. Between the two commands, a start address for the Read mode needs to be issued. Refer to the figures below for the sequence and the block diagram (Refer to the detailed timing chart.). For X8 : A data transfer operation from the cell array to the Data Cache via Page Buffer starts on the rising edge of in the 30h command input cycle (after the address information has been latched). The device will be in the Busy state during this transfer period. After the transfer period, the device returns to Ready state. Serial data can be output synchronously with the clock from the start address designated in the address input cycle. |
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