NM1282KSLAXAL datasheet(16/120 Pages) NANYA

16 / 120 page

Version 1.3

Nanya Technology Corp.

06/2018

2Gb SLC NAND + 2Gb LPDDR2

NM1282KSLAXAL

NTC Proprietary

Level: Property

AC Test Condition

Parameter

Condition

VCC : 1.70 to 1.95V

Input level

VCC

– 0.2 V, 0.2 V

Input pulse rise and fall time

3ns

Input comparison level

Vcc / 2

Output data comparison level

Vcc / 2

Output Load

1 TTL GATE and CL=30pF

NOTE 1

Busy to ready time depends on the pull-up resistor tied to the RY/ pin.

Programming / Erasing Characteristics

(Ta= -25 to 85

℃, V

=1.70 to 1.95V)

Symbol

Parameter

Min

Typ.

Max

Unit

tPROG

Average Programming Time

–

300

700

μs

tDCBSYW1

Data Cache Busy Time in Write Cache (following 11h)

–

μs

tDCBSYW21

Data Cache Busy Time in Write Cache (following 15h)

–

700

μs

Number of Partial Program Cycles in the Same Page

–

cycle

tBERASE

Block Erase Time

–

3.5

NOTE 1

tDCBSYW2 depends on the timing between internal programming time and data in time.

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