DSP56857 datasheet(196/662 Pages) FREESCALE

196 / 662 page

5685X Digital Signal Controller User Manual, Rev. 4

8-18

Freescale Semiconductor

8.7.6.5 SCI0 Receiver Idle Interrupt Priority Level

(SCI0_RIDL IPL)—Bits 7–6

This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs

are limited to priorities zero through two and are disabled by default.

•

00 = IRQ disabled (default)

•

01 = IRQ is priority level 0

•

10 = IRQ is priority level 1

•

11 = IRQ is priority level 2

8.7.6.6 SCI0 Transmitter Idle Interrupt Priority Level

(SCI0_TIDL IPL)—Bits 5–4

This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs

are limited to priorities zero through two and are disabled by default.

•

00 = IRQ disabled (default)

•

01 = IRQ is priority level 0

•

10 = IRQ is priority level 1

•

11 = IRQ is priority level 2

8.7.6.7 SCI0 Transmitter Empty Interrupt Priority Level

(SCI0_XMIT IPL)—Bits 3–2

This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs

are limited to priorities zero through two and are disabled by default.

•

00 = IRQ disabled (default)

•

01 = IRQ is priority level 0

•

10 = IRQ is priority level 1

•

11 = IRQ is priority level 2

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