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DSP56857 Fiches technique(PDF) 72 Page - Freescale Semiconductor, Inc |
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DSP56857 Fiches technique(HTML) 72 Page - Freescale Semiconductor, Inc |
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72 / 662 page ![]() Introduction 5685X Digital Signal Controller User Manual, Rev. 4 2-4 Freescale Semiconductor Table 2-1. Functional Group Pin Allocations Functional Group Number of Pins Detailed Description 853 854 855 857 858 Power (VDD, VDDA, or VDD Core) 1818 1521 21 Table 2-2 Ground (VSS or VSSA) 1717 1519 24 Table 2-3 External Chip Select Signals* 39 39 39 — 39 Table 2-4 External Bus Control Signals 4444 4 Table 2-5 Host Interface (HI)* 16 16 — 16 16 Table 2-6 Quad Timer Module (TMR) Port* 4414 4 Table 2-7 Interrupt and Program Control 7777 7 Table 2-8 Serial Communication Interface (SCI0) Ports* 2222 2 Table 2-9 Serial Communication Interface (SCI1) Ports* 2222 2 Table 2-10 Enhanced Synchronous Serial Interface (ESSI0) Port* 6666 6 Table 2-11 Enhanced Synchronous Serial Interface (ESSI1) Port* — — — 6 6 Table 2-12 Serial Peripheral Interface (SPI) Port* 4 4 — 4 4 Table 2-13 Clock and Phase Lock Loop (PLL) 3333 3 Table 2-14 JTAG/EOnCE 6666 6 Table 2-15 *Alternately, General-Purpose I/O pins |
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